Dissertation > Excellent graduate degree dissertation topics show

Study on Multi-core-based Parallel Processing of Parallel Discrete Event Simulation

Author: ZhaoYuLiang
Tutor: YaoYiPing
School: National University of Defense Science and Technology
Course: Computer Science and Technology
Keywords: Parallel Discrete Event Simulation Multicore Multithreading Adaptive strategy Synchronization control Send a message
CLC: TP332
Type: Master's thesis
Year: 2009
Downloads: 75
Quote: 1
Read: Download Dissertation

Abstract


In recent years, with the development of multi-core hardware technology, the computer has become a mainstream multi-core CPU configuration, and multi-core parallel processing technology based on more and more attention. But most of the simulation platform is difficult in practical applications efficient use of CPU multi-core properties. Parallel discrete event simulation to improve the operational efficiency and take full advantage of multi-core CPU features the ability of the parallel discrete event simulation of multi-core parallel processing technology research has become imperative. Papers for parallel discrete event simulation features in the comprehensive analysis of parallel discrete event simulation fundamentals and multi-core parallel processing technology, based on multi-core parallel discrete event simulation parallel processing key technology in-depth analysis and research, the main work and innovations include: a present mostly parallel discrete event simulation can be achieved through parallel processing of multiple processes, each process can be only serial execution, it is difficult to fully tap the potential of parallel applications. To solve this problem, the paper on parallel discrete event simulation logical process (LP) operation processes based on the analysis, we propose a multi-process and multi-threaded parallel combination of discrete event simulation run frame. The framework of parallel processing in multi-process, based on the basic unit of parallel discrete event simulation for thread-level parallelism LP optimized to further tap the potential of parallel simulation program. (2) excessive number of processes will cause the system to a large number of switching overhead, while too little will reduce the number of processes and threads multicore CPU utilization. To solve this problem, the paper proposes a parallel discrete event simulation of multi-core parallel processing adaptive strategy. This strategy considers the CPU through comprehensive auditing and simulation object size and other factors, a reasonable create LP, the thread in order to ensure the full and effective utilization of multi-core computing resources, and the simulation objects in each distribution on the LP to make automatic decisions to reduce different LP between the communication overhead. 3 In parallel discrete event simulation is running there are a lot of synchronization control, these synchronization control has become fast parallel discrete event simulation running one of the major bottlenecks. To this end, the thesis for synchronizing parallel discrete event simulation control features in the depth of the existing synchronization method based on the research, proposed and implemented an adaptive multi-core parallel thread-level synchronization control mechanism. The mechanism by using the event object and Butterfly Barrier synchronization control in two different ways, and the synchronization control for optimization of thread-level parallelism to improve parallel discrete event simulation of multi-core computing resources in different conditions of parallel processing capabilities. 4 parallel discrete event simulation is running mainly includes event handling and message sending two part of the work, and now both part of the work is mostly serial execution, it is difficult to achieve efficient parallel system. Papers dealing with the incident through the analysis of the characteristics messaging, proposed and implemented an adaptive multi-core multi-threaded event, the message handling mechanism. The mechanism by using multi-threaded parallel discrete event simulation method to the event message transmission processing and parallel processing, thereby improving the simulation execution parallelism. Based on the above, based on parallel discrete event simulation support environment YH-SUPE designed and implemented to adapt to multi-core parallel discrete event simulation support environment YH-SUPE-MC. This environment can automatically based on multi-core computing resources for logical process simulation applications to create and distribute simulation objects, the synchronization control and messaging for adaptation optimized multicore thread-level parallelism. After testing, based YH-SUPE-MC simulation applications running on a dual-core computer speed compared to YH-SUPE increased about 10% -15%; YH-SUPE-MC in four core computer run faster than YH-SUPE increased by 15% -24%.

Related Dissertations

  1. Implementation and Research of Illegal Websites Detection System Based on Comparison Methods,TP393.08
  2. TilePro64 multicore processors based H.264 HD video decoding software design,TN919.81
  3. Based on multi-core SMP cluster environment parallel ray tracing simulation of satellite imagery and Implementation,TP391.41
  4. Combination of multi-core based on the generalized Gaussian image classification method,TP391.41
  5. Research on YH-SUPE-based Component Debugging Technology of Parallel Discrete Event Simulation,TP391.9
  6. Research and Implementation on BOM-based Modeling Technology for Parallel Discrete Event Simulation,TP338.6
  7. The Research on Synchronized Theory of Vibration Machine Driven by Multi-motor,TB533
  8. Research on Synchronization Control Strategy of Shaftless System,TS803.6
  9. The Application of Fuzzy Control in Electromagnetic Propulsion Based on FPGA,TP273.4
  10. Labview-based Wireless Sensor Network Monitoring Software,TP277
  11. Paver set traction running gear speed control system,U215.6
  12. Design and Implementation of Instant Messaging System on CDMA Network,TN929.533
  13. Research on Page Coloring Based Cache Sharing Policies in Multicore RT System,TP332
  14. Based on the S7-300 spiral pipe production line automatic control system design delivery,TP273
  15. Multi-core parallel cluster environment GeoComputation execution time prediction technology research,TP338.6
  16. Dynamic analysis based on multi-core acceleration method,TP332
  17. Research of Optimization Strategy for Parallel Graph Partitioning,TP338.6
  18. Research and Design of a Heterogeneous Multi-core Architecture for Computation-intensive Task,TP332
  19. Research on OpenMP Loop Scheduling Algorithm and Parallel Sparse Matrix-Vector Multiplication Algorithm on Multi-core Processors,TP311.11
  20. Program optimization based on multi-core systems technology research,TP332

CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
© 2012 www.DissertationTopic.Net  Mobile