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Research on ΔΣ Fractional-N Frequency Synthesizer in 0.18 μm RF CMOS Technology

Author: LiuYang
Tutor: ZhangWei
School: Tianjin University
Course: Microelectronics and Solid State Electronics
Keywords: fractional-N frequency synthesizer delta-sigma charge pump voltage-controlled oscillator phase noise
CLC: TN74
Type: Master's thesis
Year: 2009
Downloads: 44
Quote: 2
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Abstract


AΔΣfractional-N frequency synthesizer based on Chartered Semiconductor 0.18μm RF CMOS process is presented.First of all, the principle ofΔΣfractional-N frequency synthesizer is analyzed. The quantization noise of MASH 1-1-1 and 4-bit 3rd-order modulator is discussed. System level simulation models of frequency synthesizer are built, including transient simulation model, phase noise analysis model and nonlinear analysis model. Emphasis is put on the quantization noise analysis ofΔΣmodulator which caused by the current mismatch of charge pump. The system level simulation models provide theoretical guideline for circuit design. On the basis of mathematic model analyzing and behavioral simulation, the main parameters and the structure of the system are optimized. The charge pump, LC voltage-controlled oscillator and auto-calibration circuit are designed basing on the process. An improved structure of charge pump is proposed to reduce the mismatch between the charging current and discharging current. Switched-capacitor array is adopted to enlarge the frequency range and reduce the gain of the oscillator. The tail current source and 2nd harmonic filter are employed to suppress the phase noise. Finally, the layout is completed and taped out. The measurements show that the current consumption of the voltage-controlled oscillator is 5mA, the phase noise is -120dBc/Hz at the offset frequency of 900kHz and the gain of VCO is 70MHz/V.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Frequency synthesizer technology,frequency synthesizer
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