Dissertation > Excellent graduate degree dissertation topics show

Advanced video decoding chip back-end research and achieve

Author: ChenZhiQun
Tutor: ZhaoWenQing
School: Fudan University
Course: Electronics and Communication Engineering
Keywords: Automatic placement and routing Clock tree Voltage drop Static timing analysis Timing-driven Dual-channel memory
CLC: TN47
Type: Master's thesis
Year: 2010
Downloads: 84
Quote: 1
Read: Download Dissertation

Abstract


This paper describes the physical implementation of advanced video decoding processor chip and the verification process , a total of 1.13 million digital circuits and 41 IP in the chip , including 33 dual-port SRAM , 4- Mask ROM , 3 PLL and an 8bit DAC , Total the 239IO, work in the 180-200MHz frequency using UMC 0.162um the process contains DDR have some special requirements on the layout of the chip , high- frequency , power consumption , small size , and insufficient power supply compatible Three package , demanding power layout . Meet 0.18um, the process of back-end processes ; establish based on cadence companies encounter on the physical implementation and verification process , discusses how the back end by timing library and a clock tree (CTS) to deal with the DDR, to reduce the front to the rear end , back-end to front-end ECO repeated the number of times , to shorten the design cycle ; solve timing analysis tools encounter and verification tools primetime different results ; how to achieve the high-frequency clock clock tree (CTS); how to reduce layout (floorplan) static and dynamic voltage drop (IR-Drop).

Related Dissertations

  1. Power LED thermal modeling analysis of the junction temperature test,TN312.8
  2. Physical implementation of video processing chip HTV190 study,TN47
  3. ASIC Design and Implementation of EoPDH in Deep Submicron Technology,TN492
  4. Design of Embedded 8-Bit Microcontroller,TP332
  5. The Research of Clock Tree Synthesis Methods Based on Chip Design Garfield5,TN432
  6. Signal Integrity Analysis of Power/Ground Net in High Speed Chips,TN402
  7. Study of Power MOSFET Application in the High-power Electronic Switch,TM564
  8. The ASIC chips hierarchical back-end implementation,TN492
  9. Tcl scripting language based ASIC backend design,TN402
  10. Physical design and verification of PowerPC processor IP core,TN47
  11. Research on Low Voltage Ride Though Capacity of Doubly-Fed Wind Power Generator Based on the Accurate Model,TM614
  12. Detection of Dynamic Voltage Restorer and Control Strategy,TM761.1
  13. Research on Control Strategy of Thyristor Voltage Regulator in Distributed Generation System,TM61
  14. SOC ENCOUNTER one million ASIC backend design,TN47
  15. Since the launch of the pre-load interface chip Design and Implementation,TN402
  16. Research on Control of Grid-side LCL-VSR and Its Responses to Voltage Dip for Wind Power Generation,TM461
  17. The Design of the Digital Part of Image Sensor Based on LVDS,TP212
  18. Research and Simulation Analysis on Compensation Strategy of Dynamic Voltage Restorer,TM761.12
  19. Back-end Design of the Digital Circuit for UHF Passive RFID Tag,TN79
  20. Design and Verification of an 8-bit MCU Based on Wishbone Bus,TP332

CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
© 2012 www.DissertationTopic.Net  Mobile