Dissertation > Excellent graduate degree dissertation topics show

Study and Implementation on Transmission-bus of Absolute Encoder

Author: XiaLiang
Tutor: SongBao
School: Huazhong University of Science and Technology
Course: Mechanical and Electronic Engineering
Keywords: absolute encoder interface protocol FPGA
CLC: TN762
Type: Master's thesis
Year: 2011
Downloads: 129
Quote: 0
Read: Download Dissertation

Abstract


With respect to the requirements of precision and the speed of the feedback position to the high speed and high precision CNC system are becoming increasing high, high-precision absolute encoder applications are being used widespread. The data of absolute encoder is usually outputted by special interface and protocol, so the date transmitted of absolute encoder is very important.Although,some domestic enterprises have developed absolute encoder, they don’t have the selfdeveloped interface and protocol, they all use the foreign standard. On the one hand, the customers who use the absolute encoder must pay more because of the restriction of intellectual property, patent and special decoding ASIC. On the other hand, the interface and protocol themselves have some disadvantages such as low-transmitting-clock, low anti-interference ability, and transmission delay, especially when the cable is long, so the use of the interface and protocol is limited. Here the thesis developes a HSI(Hight-speed Serial Interface) bus of absolute encoder.The main contents of the thesis as follows.According to the“Open Systems Interconnection Basic Reference Model”, HSI bus is optimized and expounded into three layers, physical layer, link layer and application layer. Scheduling mechanism and fault tolerance mechanism of the transmission-bus are researchedFor the RS485 interface that is popularly used for foreign absolute encoder protocol has the drawbacks,such as low-speed, low-reliability, so a fieldbus interface that is based on Ethernet technology applied for HSI. THSI interface can effectively solve the data transfer delay, and greatly improve the reliability. In allusion to characteristics of Ethernet, a tranmission protocol and reliability security mechanism of HSI is put forward.The field programmable gate array (FPGA) and its programming environment QuartusII and its programming language VHDL has been used for HSI bus protocol which is designed by the method of the top-down modular, the key modules of the HSI is simulated and tesed.Three test platforms of HSI bus protocol has been built, and the experimental procedures of HSI bus protocol are given according to one of those, the reliability of the whole system is verified and tested . At the end of the thesis ,HSI and other foreign absolute encoder interfaceand protocol are compared.

Related Dissertations

  1. Study of Interaction between Epoxy Molecules and Carbon Fiber Surface with Molecular Simulation,TB332
  2. Research on Electromagnetic Acoustic Transducer Detection System Based on FPGA,TH878.2
  3. Research on Automatic Detection Algorithm for Substructure Distress of Highway Pavement Based on SVM,U418.6
  4. Study on Drive and Control System of Five-Phase PMSM Based on FPGA,TM341
  5. Development of LXI Arbitrary Waveform Generator,TM935
  6. Research on Induction Motor Vector Control System Adapting Multi-Bus Communication Mode,TM346
  7. Design of Digital Predistorter for RF Power Amplifier Based on FPGA,TN722.75
  8. Synchronization and Channel Estimation Algorithm in Bursted OFDM System and Its Implementation on FPGA,TN919.3
  9. Performance Analysis of Anti-Multipath Capability in DSSS System and Study on the Compensation Methods,TN914.42
  10. Optimizing and Realising Research on Vedio Compression in TV Guidance System,TN919.81
  11. Research and Development of Multi-Static High Frequency Radar Central Host Software,TN957.5
  12. Research and Design of High Layer Protocol in DMR Trunking System,TN929.52
  13. Research and Hardware Simulation of Multiuser Spread Spectrum Code Acquisition Based on FPGA,TN914.42
  14. Research on Basic Algorithms of Digital Image Processing and Implementation with FPGA,TP391.41
  15. Research of High Speed Image Pre-processing System Based on FPGA,TP391.41
  16. FPGA/DSP Image Co-processor Technology and Ethernet Data Transmission,TP391.41
  17. Design of High-Speed Digital Image Acquisition and Interface Based on FPGA,TP274.2
  18. Development of Inductance Sensor Data Acquisition System Based on FPGA,TP274.2
  19. Development of Serial Bus Analyzer Based on Nios,TP274
  20. Development of PMC High-speed Data Transmission Board Design Based on FPGA-RocketIO_X,TP274.2
  21. Development of Pxibus High Performance Digital I/O Module,TP274

CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Modulation technique and the modulator,demodulator and the demodulator > Encoder
© 2012 www.DissertationTopic.Net  Mobile