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SATA (Serial Advanced Technology Attachment) is a connecting host bus adapters and mass storage devices such as hard drives, CD-ROM computer external bus interface. Compared to the parallel ATA interface , SATA interface using a pair of differential lines for data transmission and reception, an effective solution to the serial data transmission interference problems . In terms of speed , SATA 1.0 can achieve 150 MB / s transfer rate , SATA 2.0 can achieve 300 MB / S transmission speed , the latest SATA 3.0 standard is to achieve 600 MB / s transfer speeds , substantially increased transmission performance. In addition , SATA interface supports hot-swappable , improved CRC data , commands, and stateful packet error checking ability to improve the overall accuracy of the access . SATA is currently widely used, but mainly the purchase of foreign domestic integrated chip , there is no independent research results. Gives a complete SATA host controller design. With Xilinx's Virtex 4 FPGA family as the hardware development platform , using Microblaze soft- core processor and interrupt processing of data read and write commands , PLB bus transfer commands and data , Block RAM as the storage medium , through SATA IP core module and device-side data interaction. According SATA protocol to establish the various hierarchy and functions at various levels based on a modular division . The physical layer state machine , band signal control, power-on reset , the link layer state machine , cyclic redundancy check , data scrambling and other function modules design and implementation. After power on the receiving device side to send data, and device status information for analysis. Verilog HDL language used to describe the desired controller and using Xilinx ISE Simulator comes with functional simulation , using online logic analyzer Chipscope pro the next board debugging. Optimize code for Verilog , to avoid competition state generation , making the program more stable. The lower plate test results show that the controller is operating correctly , and SATA protocol description function coincide .
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