Dissertation > Excellent graduate degree dissertation topics show

FPGA-based SATA host controller design

Author: ChenCai
Tutor: ZhouGongYe
School: Huazhong University of Science and Technology
Course: Computer System Architecture
Keywords: Serial Advanced Technology Attachment Agreement Programmable logic device design Emulation
CLC: TP331
Type: Master's thesis
Year: 2011
Downloads: 107
Quote: 0
Read: Download Dissertation

Abstract


SATA (Serial Advanced Technology Attachment) is a connecting host bus adapters and mass storage devices such as hard drives, CD-ROM computer external bus interface. Compared to the parallel ATA interface , SATA interface using a pair of differential lines for data transmission and reception, an effective solution to the serial data transmission interference problems . In terms of speed , SATA 1.0 can achieve 150 MB / s transfer rate , SATA 2.0 can achieve 300 MB / S transmission speed , the latest SATA 3.0 standard is to achieve 600 MB / s transfer speeds , substantially increased transmission performance. In addition , SATA interface supports hot-swappable , improved CRC data , commands, and stateful packet error checking ability to improve the overall accuracy of the access . SATA is currently widely used, but mainly the purchase of foreign domestic integrated chip , there is no independent research results. Gives a complete SATA host controller design. With Xilinx's Virtex 4 FPGA family as the hardware development platform , using Microblaze soft- core processor and interrupt processing of data read and write commands , PLB bus transfer commands and data , Block RAM as the storage medium , through SATA IP core module and device-side data interaction. According SATA protocol to establish the various hierarchy and functions at various levels based on a modular division . The physical layer state machine , band signal control, power-on reset , the link layer state machine , cyclic redundancy check , data scrambling and other function modules design and implementation. After power on the receiving device side to send data, and device status information for analysis. Verilog HDL language used to describe the desired controller and using Xilinx ISE Simulator comes with functional simulation , using online logic analyzer Chipscope pro the next board debugging. Optimize code for Verilog , to avoid competition state generation , making the program more stable. The lower plate test results show that the controller is operating correctly , and SATA protocol description function coincide .

Related Dissertations

  1. Simulation and Emulation of Methanol Distillation Process in Large-scale Coal Chemical Industry,TQ223.121
  2. Research on Cooperative Spectrum Sensing Schemes Based on Random Matrix Theory and Compressed Sensing,TN925
  3. Medical ultrasound imaging Piezoelectric transducer probe studies,TN384
  4. X-band cavity filter group delay simulation Design and Development,TN713
  5. Automated production plant simulation and optimization of resource allocation,O226
  6. Study on the Tooth Surface and Dynamic Emulation of Involute Beveloid Gear Formed by Movement of Base Circle,TH132.41
  7. Research on the Risk Elimination and Reinforcement Effect of Wulasitai Reservoir Stone Masonry Arch Dam Base on Finite Element Method,TV698.23
  8. Research on Kinematic Attitude Control of Autonomous Underwater Vehicle,TP242
  9. Design of 2FSK demodulator front - end,TN763
  10. Design and Realization of Circuit Simulation System Based on SPICE,TN702
  11. Design and Implemention of Emulation Testing System on PC Base on SDH Light Transmission Network,TN929.1
  12. Research on Variable Batch Flexible Manufacturing Application Platform for Electronic Circuit oriented tio Surface Mounting Technology,TN710
  13. Research on Direct Torque Control of Permanent Magnet Synchronous Motor for Electric Vehicle,TM341
  14. The Method Research on Compensation of Maximum Gradient for Long Railway Tunnel,U212.3
  15. Research and Implementation of MPLS Pseudowire Fault Detection and Recovery Technology Based on VCCV,TN915.06
  16. The Flow Emulation of ATM,TP391.9
  17. Research and Implementation of CRH1 EMU inertia simulation scale system,U266
  18. Micro Controller Unit Experimental System Design and Application,TP368.12
  19. Study on the Sensor Technology of Wire Rope Magnetic Leakage Signals,TG115.284
  20. The Research and Realization of Road Dynamic Weighing System,TH715.1
  21. Algorithm Research and Software Implementation of Locomotive Monitoring System,U284.48

CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Basic circuit
© 2012 www.DissertationTopic.Net  Mobile