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Design Techniques of P-Type CMOS Circuits for Leakage Reduction in ICs

Author: YeLiFang
Tutor: HuJianPing
School: Ningbo University
Course: Circuits and Systems
Keywords: Leakage power consumption is reduced P-type logic structure technology Energy Recovery circuit
CLC: TN402
Type: Master's thesis
Year: 2011
Downloads: 7
Quote: 0
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Abstract


With the rapid development of the integrated circuit chip leakage current power consumption has become an important indicator of the area and speed of integrated circuit design relay . In advance of the CMOS process (e.g., 0.25μm ), The node capacitance charging and discharging the dynamic power is the primary power source . Therefore , to reduce the circuit charge and discharge dynamic power consumption became the main design goals of low power consumption . Energy recovery circuit as a new low-power circuit , a significant effect in dynamic power savings . In recent years , CMOS integrated circuits into the deep sub- micron technology , leakage power dissipation has become a source of power to compete with the dynamic power , leakage -power integrated circuit development will become a key constraint in the future of micro- processing chip . With the the MOSFET size of shrinking , the gate leakage current (gate leakage current) is becoming more and more significant . When the IC process technology into the 65nm , the gate leakage current becomes a major component of leakage current . The same size of the PMOS transistor gate leakage current through the gate oxide layer than the NMOS transistor is much smaller , so this article as an object of study , research , and the leakage -power reduction of integrated circuits based on the logic of the P-type sequential circuits and combinational circuit small technology. Conventional CMOS circuits using a pull-up PMOS and pull-down NMOS transistor design technology , the paper break through the conventional CMOS circuit structure , the use of adiabatic computing principles, and a PMOS transistor and NMOS transistor principle of duality , logic functions with MOS tube topological relationships building energy recovery circuit based PMOS transistor structure . Type this article select a number of typical energy recovery circuit , the design of the new structure of the P-type circuit HSPICE simulation results show that the new circuit design with low leakage power consumption characteristics .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Design
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