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Based on the CTIA snapshot infrared readout circuit research
Author: ShenKe
Tutor: RuanAiWu
School: University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: CTIA ROIC user defined windowing selectable output ports
CLC: TN215
Type: Master's thesis
Year: 2009
Downloads: 151
Quote: 0
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Abstract
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Infrared focal plane array (IRFPA) is an important optics-electronic device to capture infrared radiation, which consists of infrared detector arrays and CMOS readout integrated circuit (ROIC). The performance of IRFPA is affected directly by ROIC. Therefore, high performance ROIC is the key device to ensure IRFPA works well.Based on analysis of the present status of ROIC, CTIA structure is adopted to design a 320×256 multi-function ROIC for IRFPA. Snapshot integration mode is introduced to obtain variable integration time and accommodate the wide scene dynamic range requirements. The ROIC cell circuit with snapshot mode requires more devices. The small pixel size usually limits the readout input circuit complexity. Thus it is difficult to implement complicated readout circuits like CTIA in a 30μm×30μm pixel area. A new CTIA stracture based on Cascode amplifier is proposed to meet the design requirments. With the new structure, the whole cell circuit is achieved in a 30μm×30μm pixel, including selectable integration capacitors, bandwidth limitation capacitors and anti-blooming transistor. Several user programmable functions are actualized by designing the complex digital logic control circuits. These functions includes user defined windowing, controllable reading out sequence, selectable output ports and so on. The ROIC chip is fabricated in MPW mode. Because of the area limitation, a 32×32 ROIC is taped out instead of 320×256 ROIC. However, the small array realized all the functions as the 320×256 array. The whole circuits layout are designed based on HH-NEC 0.35μm 1P4M standard CMOS process, and full custom layout design method were used. The overall area of the 32×32 ROIC chip is 3mm×4mm. A simple testing system is built to test the ROIC chip, which uses FPGA to generate the logic control signal. The testing results indicates that the function of this ROIC chip according to design requirements. All functions are realized, such as user defined windowing, controllable reading out sequence, selectable output ports.
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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Photonics technology,laser technology > Infrared technology and equipment > Infrared detection,infrared detectors
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