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Research on Reconfigurable System-on-Chip for Supporting Function Level Transparent Hardware Programming

Author: ZhuHai
Tutor: LiRenFa
School: Hunan University
Course: Computer Science and Technology
Keywords: Reconfigurable Computing Reconfigurable System-on-Chip The hardware transparent programming model Part of the dynamic reconfiguration Hardware function
CLC: TN47
Type: Master's thesis
Year: 2009
Downloads: 62
Quote: 1
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Abstract


Reconfigurable system-on-chip (Reconfigurable System-on-Chip, RSoC) usually contains a microprocessor, reconfigurable computing unit, memory and so on. Wherein the microprocessor is used to perform the sequential and non-critical code, while having a high degree of parallelism or compute-intensive applications can be placed on the reconstruction unit implemented by hardware accelerator. This microprocessor and reconfigurable hardware modules mixed structure, taking into account the efficiency of the flexibility of general-purpose microprocessors and ASIC technology is considered to meet future embedded computing an extremely competitive solutions. Reconfigurable on-chip system, the hardware resources is different from the traditional understanding as fixed, but as software that can be flexibly configured, thus narrowing the difference between hardware and software to enhance the degree of blend between. But in enhanced system performance at the same time also brings design difficulties. Designers need to learn more about the configuration of the hardware interface details, management hardware accelerators, the development of hardware and software communication method, thereby increasing the complexity of the system design, it is difficult to achieve efficient and reliable design process. In response to these problems, a support process-level hardware transparent programming reconfigurable on-chip system. In this system, the hardware module is packaged as a function of the form, and based on the application characteristics are classified into a hardware library available to the designer so that it can simply and easily by software Advanced language calling function described system. Modular package in order to enhance the portability of the hardware functions of the hardware function, closely related with the underlying hardware and operating system portion of the hardware function to extract is designed as a separate module. Application in the Linux kernel increased reconfigurable Explorer and hardware function driver management module for unified management for dynamic configuration of the hardware functions and underlying driver running state. Xilinx Virtex-II Pro FPGA family to establish a reliable, modular dynamic part of the reconstruction of the system design process, including the establishment of the initial hardware platform, static and reconfigurable module division and design, module activation and system integration steps. Finally, a dynamic part of the main graphical image applications reconfigurable prototype system is designed and implemented in the Xilinx Virtex-II Pro XC2VP30 platform. In order to verify the whole package, by running the hardware function instance into the performance testing of prototype systems. Experiments show that the system is better able to support process-level hardware transparent programming, designers do not understand the configuration of the hardware accelerator and interface details, simply call the appropriate hardware function in the program, the system will automatically complete the hardware accelerator configuration, and control the accelerator perform computing tasks, simplifies the design process. The experimental results show that, by calling the hardware function to replace the corresponding software functions, the computing capacity of the system has been greatly improved.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
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