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The VMM-based Verification of End Office’s UGTC

Author: ShiHua
Tutor: LiuYi
School: Xi'an University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: VMM UGTC Verification
CLC: TN407
Type: Master's thesis
Year: 2009
Downloads: 105
Quote: 6
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Abstract


With the booming of the scale and complexity of IC design, verification work becomes more and more difficult. Because verification work account for 70 percent of total product development cycle, it becomes the Bottleneck of the modern digital system’s product development cycle. How to put up a powerful, efficiently, flexible and good scalability verification platform becomes the focuses to which engineers are pay attention.On basis of mastering the test requirements of UGTC module in OLE (Optical Line Terminal) chip, this paper mainly studies how to put up a efficiently, hierarchical and reusable UGTC verification environment based on VMM,which is the goal of this paper.After implementating verification platform, the development strategy of test case based on coverage is studied in this paper. This paper has developed test case to simulate and verificate all the functions of UGTC. All indexes of code coverage fulfill the requirements of project team, the line coverage is 98.7%, the condition coverage is 95.7%, the fsm coverage is 96.5%. The process of verification of UGTC module embobys the advantage of VMM.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Testing and inspection
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