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Research on the Driving System of Step-Motor Realized by IP Core

Author: LuYuFeng
Tutor: DuKunMei
School: Harbin University of Science and Technology
Course: Power Electronics and Power Drives
Keywords: Stepper motor control IP core Subdivision Driver Simulation
CLC: TM383.6
Type: Master's thesis
Year: 2009
Downloads: 233
Quote: 1
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Abstract


Stepper motor is an electrical pulse signal is converted into a corresponding angular displacement or linear displacement of the mechanical and electrical components, with easy-to-open-loop control, no accumulated error, etc., has been widely used in many fields. With the development of the national economy, increasing people's living standards, the further strengthening of the industrial production level of automation, control accuracy of the various fields of the control system have higher requirements, which require high-performance stepper motor driver. With the development of microelectronics technology, the digital control more and more attention to the majority of researchers, but there is no nuclear stepper motor control IP (IntellectualProperty), which greatly increase the drive difficult to develop, extend the development cycle, reduce the stability of the system. The topic of this situation, in-depth study of the critical infrastructure stepper motor control algorithms and control technology, designed for stepper motor control IP core. Firstly, the stepper motor control critical control algorithms and control technology for in-depth research, and the development of IP cores for stepper motor control, vector control and segmentation of the stepper motor drive control introduces a coordinate rotation digital computer algorithm developed IP core used to subdivide the drive control. PWM and digital PI control technology, developed suitable for motor control PWM IP core and digital PI IP core. Developed for stepper motor control SPWM inverter control for frequency control DDS IP nuclear. Prepared for each IP core software test platform, simulation tools using Mentor Graphics' ModelSim for each IP core functional simulation and timing simulation. Functional simulation to verify the correctness of the IP core logic functions. Timing simulation to verify the validity of the time delay of the IP cores exist, further analysis to verify the IP core. IP core based on IP core functional simulation and timing simulation results of the optimization and adjustment. Altera's Cyclone II series FPGA as the core, designed for IP core hardware test platform. Finally, on the hardware platform, built with the design of the IP core based on current sinusoidal PWM motor driver. IP core in this system will be download to the FPGA chip, the IP core performance was verified by the actual system, experiments show that the entire system can be stable operation of the IP core to achieve the design features, and has a good reusability and robustness.

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CLC: > Industrial Technology > Electrotechnical > Motor > Micro-motor > Control of micro motor > Stepping decline of motor
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