Dissertation > Excellent graduate degree dissertation topics show

0.13 stacked dynamic random access memory lithography process optimization

Author: YiXuDong
Tutor: JiangGuoBao；YangXiaoSong
School: Fudan University
Course: IC Engineering
Keywords: Stacked dynamic random access memory Defocusing Lithography Crystalline mist
CLC: TN405
Type: Master's thesis
Year: 2011
Downloads: 23
Quote: 0
Read: Download Dissertation

Abstract


In this paper, a of 0.13um stacked dynamic random access memory technology optimized to carry out in-depth study and discussion of the important parameters of the lithography process. Stacked dynamic random access memory process development has a certain significance. In this paper, a brief introduction 0.13um stacked dynamic random access memory process. This particular process structure is different from the traditional buried dynamic random access memory, so the more special process characteristics. Yield-limiting problems encountered by the paper of 0.13um stack dynamic random access memory lithography process is summarized and analyzed. Eventually come to solutions through the design of experiments and theoretical analysis. This article focuses on the following questions alignment optimization analysis and research: 1. Layer and between the layers. Due to the 0.13um stacked dynamic random access memory technology structure special alignment accuracy between some of the layers have higher requirements. As customers' needs, our products only in poor alignment accuracy CANON machine table for exposure. To some of the key layer between alignment bring difficulties, the paper through the alignment principle, greatly improving the alignment accuracy of the product from the alignment methods and improve the quality of the alignment mark. Solution for process critical layer Bit Line pattern collapse problem. Due to the difference on the middle of the wafer and the edge of the polishing rate in the CMP process, may result in some regions of the edge is not flat. Plus Bit Line layer line width, exposure focal length to a small range of floating, wafer edge region easily defocusing. This article is through process improvements and a numerical aperture greater machine on Bit Line pattern collapse issues resolved. 3 storage unit light doping a layer the CLD masking failures solution. For dynamic random access memory, on both sides of the POLY doping is naturally very important. Due to structural characteristics the 0.13um stacked dynamic random access memory PLOY line is curved, so the masking for the non-doped region is extremely difficult, CLD and not masking the non-doped region will lead should ion implantation place by ion injection, if CLD linewidth too, will block the next ion implantation doping zone angle. Successfully solved the problem by adding anti-reflective coating and the temperature of the process and its own line width optimization. 4 For the wafer a unit within a column graph defocusing issues. Sometimes due to equipment during maintenance exposure lens to clean up after cleaning can sometimes lead to a decline in the energy intensity of the narrow area within a certain period of exposure. If you can not be found will result in the generation of the product defect. The application of a new partial coke monitoring system succeeded in solving the problem. 5 PSM (Phase Shift Mask) phase shift mask template crystalline mist generated. For more crucial layer mask crystalline mist is very dangerous, it will block the graphics area the transmission of light to form a recurring defects. In this paper, the crystalline mist generation mechanism analysis found the monitoring and prevention of crystalline mist generated.

Related Dissertations

  1. Lithography light source unit ZEMAX optical system simulation,TN23
  2. Based on the porous structure to improve efficiency of LED light,TN312.8
  3. Lithography feasibility tests and its optimization,TN407
  4. 0.16 -micron lithography LOGIC SRAM Optimization of Process Parameters,TN305.7
  5. Study on the Scanning Probe Lithograph by Atomic Force Microscopy,TS825
  6. Design and Manufacture of Micro-Cup Electronic Paper Display System Controlled by MCU,TN873
  7. 0.13μm IC lithography process platform optimization and lithography resolution enhancement technology research,TN305.7
  8. UV Light Exposure to Reduce Haze Growth Speed,TN305.7
  9. A Microfluidic Chip for Cell-based Assays,TN492
  10. Study of Proximity Effect Correction in Electron-Beam Lithograph,TN405
  11. Study on Electrochemical Immunosensor Based on Interdigitated Microelectrode,TP212.3
  12. Optimization of the Canon lithography machine linewidth of the the Olympus PROTECH2.5D software platform,TN305.7
  13. Comparative Studies on Dry and Wet Etching in Fabricating Ridge Semiconductor Laser,TN248.4
  14. Surrounding-gate MOS device nanowires key technology research,TB383.1
  15. Preparation of Cell Template by Softlithography and Co-Culture Endothelial/Smooth Muscle Cells,R318.08
  16. Thermometry of Cr Laser Cooling on Atom Lithography System Via Knife-edge,O562
  17. Research on Stimulated Raman Scattering in Organic Gas Medium,O437.3
  18. Subwavelength metal thin film filters and polarization characteristics,O484.41
  19. Soft Lithography Technique in the Fabrication of Rare Earth Luminescent Materials,TB383.2
  20. Mechanical System Design and Simulation of Reticle Stage,TH122

CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Manufacturing process
© 2012 www.DissertationTopic.Net  Mobile