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Multi-format Video Signal Conversion System Based on FPGA

Author: XiaoWenJuan
Tutor: LiangFengMei
School: Taiyuan University of Technology
Course: Signal and Information Processing
Keywords: FPGA DDR SDRAM Video format conversion Interlaced to progressive Frame rate to enhance Resolution transform
CLC: TN919.8
Type: Master's thesis
Year: 2010
Downloads: 263
Quote: 2
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Abstract


With the booming of multimedia video technology, the field of modern video has a variety of video signal formats. The proliferation of computers and the rapid development of Internet technology, making many areas of home entertainment, education and training, business presentations, and video surveillance, require different formats of video signals can be displayed in real-time on a computer monitor or a modern color TV, which raises questions a new topic: \Common video converter, often only a video format conversion, single function. Some dedicated video conversion device using a dedicated processor, the dedicated capture chip, a digital signal processing chip, a high degree of hardware complexity, high cost, is not conducive to the promotion. This project \The video image is interlaced to progressive frame rate to enhance the resolution conversion processing ultimately transmitted through the VGA port to display real-time display terminal. The system has a flexible interface, small size, light weight, easy expansion function, when the input video signal format change, simply modify the corresponding parameters can be in each module. This system is based on the Xilinx Spartan-3E series FPGA XC3S250E realize image processing functions. DDR SDRAM, with its large storage capacity, speed and cost advantages to become the image interlaced to progressive frame rate to enhance the best choice of the frame buffer. The main subject of both hardware and software design, and the design results of a comprehensive simulation test. Around the first of the design goals in terms of the overall program and conversion type chip selection and circuit design, and then in the ISE 9.1i of the Xilinx development tools to write part of the FPGA logic, using hardware description language VHDL logic design of functional modules is given key code and simulation waveform. And in-depth exposition of the DDR SDRAM controller design. This thesis completed a multi-format video signal conversion system in the FPGA-based design, validation by the CMOS image sensor signal as the system input video format conversion. The results show that the system hardware and software can be well compatible work normal video format conversion, to achieve the design goals.

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