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Transplantation and optimization based on TMS320DM642 AVS decoder

Author: LiHuiZong
Tutor: ChenLeiZuo
School: University of Electronic Science and Technology
Course: Applied Computer Technology
Keywords: AVS TMS320DM642 Transplant
CLC: TN764
Type: Master's thesis
Year: 2008
Downloads: 103
Quote: 2
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Abstract


As a second-generation video codec standard, AVS has been widespread support and has been applied in many fields. Compared with the previous standard video codec, AVS video codec standard introduction of many new theories to achieve the core algorithm to improve the performance and efficiency of the codec. However, efficient encoding and decoding efficiency is established on the basis of the high computational complexity, which presents a challenge for achieving real-time encoding and decoding hardware development platform. The TMS320DM642 is the production of a high-performance Texas Instruments DSP chips. It uses a very long instruction word structure; having 8 mutually independent functional unit logic function unit 6 includes two multipliers, these functional units can be performed simultaneously in parallel data operation; two register groups, two groups of 64 general-purpose register; DM642 chip provides two storage structures, which makes it possible to provide a wealth of data storage space; powerful chip integrated peripherals, including three video ports. These features of the DM642 chip, so that it can provide the necessary conditions AVS codec system. The goal of this paper is to transplant the RM50d DM642 platform and optimize it, and ultimately get a real-time based on the DM642 platform can decode decoder. This work is divided into two parts. Part I: AVS video decoder ported to the the DM642 platform above. DM642 platform development environment on the PC platform development environment is not the same resources in the transplant process, this paper introduces the idea of ??embedded software development, and to adjust the memory allocation, access mode, variable definitions, run support library and other aspects, and ultimately get the decoder can run correctly in DSP platform. Part II: successfully transplanted to the decoder on the DM642 platform optimized. RM50d decoding program is prepared in accordance with the AVS standard. The characteristics of the decoder is readability first effectiveness. This makes it the core module decoding speed is very slow, ported to the DSP, the efficiency is very low, its optimization. The The paper analyzes inefficiencies of RM50d, combined with the characteristics of the DM642 chip, optimized RM50d. Optimization process, using a variety of optimization methods, including: re-set the variable structure adjustment of storage space, adjust the structure of the program, the introduction of software pipelining techniques, writing linear assembly code, using the the optimizing compiler option strategy. Through a series of optimization RM50d decoder to achieve real-time decoding the DM642 software simulation environment. The experimental comparison optimize around the decoder, the decoder decoding speed implemented in this article has been greatly improved, and basically meet the requirements of real-time decoding video streams.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Modulation technique and the modulator,demodulator and the demodulator > Decoder
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