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With the theory of ultrasonic testing has become more sophisticated, as well as the rapid development of modern large-scale integrated circuits and computer technology, ultrasonic detection technology, with its fast, accurate, efficient, non-polluting, low cost, widely used in machinery manufacturing, petrochemical, aviation aerospace and other industrial sectors, ensure project quality to ensure the safety of equipment is an important means. In recent years, ultrasonic flaw detection system is toward the high-speed, digital, automated and intelligent direction, portable, low power consumption is becoming a big demand for testing operations. This project aims to develop one based embedded platform a handheld ultrasonic testing system, therefore, small size, low power consumption, high performance to become the main focus of the design. The main work is as follows: 1. Handheld ultrasonic flaw detection hardware platform based on ARM FPGA platform design is proposed and implemented. Core ARM processor because of its low-power, high-performance characteristics, through the port of the Linux operating system, as the operator of the entire platform, control; FPGA is responsible for the completion of the pre-processing of the echo signal and system the synchronous timing control. Completed by Verilog programming digital detector, non-uniform maximum extraction hardware gate alarm system simulation and verification of key technologies to solve the traditional instruments repeated low refresh rate, slow scan, detect and poor reliability shortcomings, and to facilitate follow-up high-speed The data stream processing. 3. Proposed and implemented a controllable gain of the AD8331 operational amplifier circuit design, to meet the demand for system design of low-noise, wide bandwidth, high gain. Effectively suppress band noise through the band-pass filter design, improve system signal-to-noise ratio. In low-power design, using the combination of step-up DC-DC plus LDO power supply program, both to meet the high conversion efficiency, but also improves the stability of the power supply; make full use of the power management features of the ARM system overall system power controllability; reduce static / dynamic current consumption by low-power design on FPGA; choice of small size, low power consumption LCD and use PWM backlight brightness adjustment. Miniaturization design maximize the use of highly integrated chip table SMD package, effectively reduce the layout area; same time, the external interface with a compact design, debug interface using a portable connectors instead. , The hardware platform first edition has been designed and related functions, performance testing, and reached a preliminary system design requirements.
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