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Research and Implementation of SoC embedded microprocessor debugging technique

Author: ZhaoYan
Tutor: WangZhiHua；CaoJian
School: Central South University
Course: Circuits and Systems
Keywords: SoC The on-chip real - time debugging system Serial port debugging PSTN short message terminal system software
CLC: TP332
Type: Master's thesis
Year: 2005
Downloads: 217
Quote: 2
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Abstract


As SoC ( System on a Chip System-on-Chip ) development , embedded microprocessors has become a core part of the SoC . Due to the continuous improvement of SoC integration and chip package size and pin count constraints , traditional debugging methods now can not meet the requirements of the embedded software debugging . So , embedded microprocessor or SoC debug function it is very necessary hardware support . The existing on-chip debug system based on microprocessor debug mode support . For application PSTN SMS terminal SoC design and debug functions support 8 -bit microprocessor IP core , the paper presents a design method the microprocessor debug mode does not support extended debugging features of the system , not destroy the CPU IP structure is complete , the CPU IP clock management instruction / data breakpoints , single-step , run / stop , CPU reset , view the CPU core registers , read / modify the function of the external memory , as well as online programming , and debug command set and execute completely independent of the CPU, to ensure that the real-time CPU running . This thesis is on the use of the PSTN a short message terminal SoC chip UART ( Universal Asynchronous Receiver and Transmitter, universal asynchronous transceiver , serial port ) to achieve software debugging method for hardware expansion . The case of real-time can not design using on-chip debug system , for example , due to the time factor , the use of software debugging is also regarded as a good choice . Finally , as the application of these two debugging methods , the paper also studied several key technical PSTN short message terminal SoC system software design , and the completion of various programs from the data link layer to the application layer , the PSTN a short message terminal SoC demonstration system . Proposed and implemented in this paper two debugging methods , as well as all the procedures of the demonstration system , through validation on in Spartan Ⅲ xc3s200 FPGA platform .

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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