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Design and Implementation of High-speed Channel in IPOD Chip

Author: ZhangHao
Tutor: ZhouZuCheng
School: Tsinghua University
Course: Information and Communication Engineering
Keywords: IPOD ASIC PCI core Chain Mode DMA High-speed
CLC: TN943
Type: Master's thesis
Year: 2005
Downloads: 96
Quote: 0
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Abstract


Recently, DVB services spread all over the world. It is predicted, DVB marketwill be up to 100 billion Yuan in next years in our China. DVB-S satellite datareceiver—IPOD system appears in the circumstance. IPOD system receives theDVB-S signals, and display the text image and multimedia program. The directapplication of IPOD system is “Double Country Project” in the country.IPOD system is made up of hardware and software. The hardware receives theTS packets and processes the data with DVB protocol. The software makes up the TSpackets into IP packets and displays the files. The kernel of IPOD is an ASIC chip. TSpackets are transferred through the PCI interface in DMA mode by the ASIC. Thepoint of my thesis is high-speed channel in IPOD. Firstly, we must achieve the systemfunction;secondly, we must consider the function expend;thirdly, because IPOD is aproduction in industry, we must ensure the stability and low-cost in a short period. Sothe “high-speed” means an efficient data channel and a reliable control channel. Thebase of data and control channel is the PCI interface, which is achieved by the PCIcore. The engine of data channel is DMA controller. We make use of the Chain ModeDMA strategy, and enhance the bandwidth performance of data. Control channeldesign includes local bus, multi-clock design, and reset network. The thesis willdescript the IPOD scheme and ASIC methodology. The basic research methods arePC simulation, experiment, and theory analysis. We use kinds of EDA tools to build aplatform for simulation synthesis and STA. We build FPGA system to debug and test.Then we build model to analyze the system performance. The result indicates thebandwidth of chain mode DMA is up to 476.6Mbps. It accords with the DVB service.The character of ASIC design is long-period high-cost and complexity. In IPOD,we validate the logic with PCI development board. Then we develop the FPGAverification system, which could work in the DVB-S circumstance. Finally we finishall the work of ASIC, and wait for Fujitsu Corporation to tape-out.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > TV > Transmission of television signals
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