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The Design and Analysis for Broad-band Differential CMOS LNA with Variable Gain

Author: LiSongTing
Tutor: LiJianCheng
School: National University of Defense Science and Technology
Course: Electronic Science and Technology
Keywords: A low noise amplifier Broadband Gain control Parallel peak Miller effect Negative feedback Source degenerate
CLC: TN722.3
Type: Master's thesis
Year: 2010
Downloads: 168
Quote: 0
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Abstract


The design used in direct broadcast satellite television business 900MHz ~ 2250MHz broadband gain controlled differential CMOS low-noise amplifier. Contradiction between noise performance and power consumption, as well as gain adjustment process by analyzing the contradictions between the traditional low-noise amplifier design defects: wide communication band gain, noise performance deterioration and larger power fluctuations, The paper uses a novel low-noise amplifier circuit configuration, i.e. the use of filter technology and peak structure in parallel to expand the bandwidth, then Solving the passive component values ??in the filter algorithm is given by finding the best match value This algorithm considering the degree of tolerance of the passive components can be realized as well as process variation, and the value of the demand components must also meet certain return loss conditions; negative feedback by introducing Miller resistors and transistor leakage end achieve the gain of the low noise amplifier is controllable, and in changing the low noise amplifier gain does not introduce additional noise and cause large power fluctuations, and to improve the noise performance of the low noise amplifier and power stability. Between bandwidth and gain the parallel peak structure inherent contradiction, in order to ensure low noise amplifier wide communication band high gain, the paper used in the filter after the two amplifier circuit to overcome this contradiction and theoretical derivation and qualitative description of the basis for the division of the two amplifier circuit to achieve performance, and greatly reduce the mutual restraint between the presence of changes in various parameters, as well as for the design of the circuit convenience. In order to obtain high gain and good gain flatness comprehensive consideration of the components can be realized, and tolerance to process variation, on every level of high and low frequency amplifier circuit amplifier requirements, and constraints on each level of the gain of the amplifier circuit. Using a novel algorithm to achieve the search of the parallel peak structure of the numerical values ??of each of the passive components. For the design of low-noise amplifier circuit, a detailed analysis of the low-noise amplifier design principle for determining the size of each transistor, controllable gain can be achieved, as well as high linearity implementation method. Finally, based on the analysis of this paper the design of low-noise amplifier circuit, there is given the design process of the low-noise amplifier in this article, in order to be beneficial to the other low-noise amplifier circuit design. The low noise amplifier using TSMC 0.18μm CMOS process design, operating voltage of 1.8V, the gain control voltage range for 1.3V to 1.6V input and output impedance matching and a wide range of gain variation in the band, and get a good noise performance, linearity, and low power loss.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Amplification technology,the amplifier > Amplifier > Low-noise amplifier
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