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The Circuit Design and Implementation of New Charge Trapping Memory
Author: FengErZuo
Tutor: ChenJunNing
School: Anhui University
Course: Circuits and Systems
Keywords: Embedded CTM storage system Sense amplifier High-pressure system Bandgap reference circuit
CLC: TP333
Type: Master's thesis
Year: 2011
Downloads: 20
Quote: 0
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Abstract
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With digital storage technology in mobile communications , data terminals , multimedia, and consumer electronics and other fields have wide application , Flash memory to become an important role in SOC , and in the industry has occupied an irreplaceable position. However, as technology continues to improve, and people have become increasingly demanding product performance , the traditional floating gate memory restricted in many ways can not meet people's needs , developing the next generation flash memory - charge-trapping type memory ( Charge Trapping Memory, CTM) has become an inevitable trend. As CTM technology in China is still in its infancy, for charge trapping technology research and development of embedded systems with high scientific and economic value. Papers charge trapping memory cell according to the operating characteristics and Numonyx 6 5nm 3 V 2 Gbit data sheet to a design capacity of the NOR 1Gbits type memory system architecture. Focus is designed for high-performance memory 1Gbits CTM read channel , and the sense amplifier , the charge pump system generation and management , level switches and other related bandgap reference circuit design. Finally, the paper based on SMIC's 65nm process on the CTM under the storage array and peripheral circuit layout design , and made in the layout should be aware of the problems and solutions. Based on SMIC's 90nm spice model to design embedded CTM storage systems. The new structure of the sense amplifier , simulation results show that the worst case induced for only 4.5ns, the induction time is typically less than 1ns. For 1Gbits large capacity systems that require programming, reading , block erase and programming features such as soft at the same time , the system also need to meet the requirements of reading time is less than 100ns, programming time is less than 5μs, block erase time is less than 100ms.
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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Memory
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