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Research of Less Reused Block for LLC in Chip Multiprocessors

Author: QiaoFuMing
Tutor: HuTongSen；TianXianZhong
School: Zhejiang University of Technology
Course: Applied Computer Technology
Keywords: Filet buffer less reused block predictor multiprocessors Cache less recently used
CLC: TP332
Type: Master's thesis
Year: 2011
Downloads: 12
Quote: 0
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Abstract


Multi-core Cache is currently a hot for studying. In Multi-core architecture, LLC is usually shared L2 Cache. When the data block accessed is not in L2 Cache, L2 Cache will miss, and it will take up to a hundred of CPU cycles to access main memory, the cost is intolerable.In the replacement policy of LLC, the Less Recently Used (LRU) policy was commonly employed to the system of Chip Multiprocessors. LRU policy remains some deficiencies based on previous studies. In particular, LRU may perform considerably bad when the workloads of application program are larger than L2 cache, because there are usually a great number of less reused lines that are never reused or reused for few times in L2 cache. The cache performance can be improved significantly if we keep non-less reused lines rather than less reused lines in cache for a time quantum.This paper proposes a new architecture called shared less reused filter (SLRF) that applying the less reused filter that can filter out the less reused lines rather than just never reused lines according to the context of chip multiprocessors. This will ensure efficient use of space and increase hit rate. SLRF consists of three parts including filter buffer, shadow tag and frequency predictor. The function of filter buffer is to filter less reused block and modify misprediction in frequency predictor. For providing a hit chance, we insert this block into filter buffer. When this block will accessed again, it will become a non-less reused block and insert it into the L2 Cache. The function of shadow tag is record the tag and reuse information of the block. Frequency predictor is used to record reused information of block not presented in L2 Cache. When a miss occurs, frequency predictor will predict history reused frequency information based on the history reused frequency information of block. We modify SESC simulator code to implement shared less reused filter. Our experiments on a large set of multithread benchmarks, for 11 splash-2 benchmarks, demonstrate that our technique shows a SLRF which has 256KB kilter buffer improves average IPC by 13.43% compared with the context of the nuiprocessor, and reduces the average MPKI by 18.20%.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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