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The Design and Research of Micro Small Integrated Navigation Computer Based on SOPC

Author: MengXiangChen
Tutor: QianHuaMing
School: Harbin Engineering University
Course: Navigation,Guidance and Control
Keywords: The miniature integrated navigation system Navigation computer Programmable system chip Dual Nios II processor Coordinate rotation digital computer
CLC: TN967.2
Type: Master's thesis
Year: 2011
Downloads: 60
Quote: 0
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Integrated navigation system can give full play to the advantages of each sub-navigation system, and to make up for its shortcomings, the direction of one of the navigation technology development. With the development of MEMS technology, MEMS inertial components as the core, supplemented by GPS and EC miniature integrated navigation system has become the research focus of the moment. The navigation computer is one of the core equipment for the integrated navigation system, it is always toward the development of small size, low power, high-performance orientation, building high-precision, high-reliability integrated navigation system has great significance. Therefore, application of the Navigation System for the background, design SOPC-based micro integrated navigation computer system based on the development trend of the navigation computer. First, the analysis of the strengths and weaknesses of the individual navigation of a of micro SINS GPS and EC SINS, Federated Kalman filter theory, the combination of MSINS / GPS / EC combination navigation system way and filtering scheme of the Altera SOPC work principles, techniques, tools and operational processes, given the overall framework of SOPC-based micro integrated navigation computer hardware and software. Secondly, based on micro integrated navigation system navigation computer design based on Cyclone III family chip EP3C40Q240 of minimum system board power supply circuit configuration circuit and external RAM circuit to meet the system navigation computer interface, small size, high performance requirements. Of MIMU, GPS and EC unit circuit design and device selection, the circuit is modular in design, connected through an interface board, as well as to improve the stability of the system, the interface board designed two sets of independent power. Full double Nios II processor startup method and communication, and the validation and comparison, the successful realization of the dual Nios II processor systems to build a distributed navigation computer-chip, dual-processor division of labor, to improve the system control capacity and data processing capability. Cordic algorithm to improve the execution speed of the navigation algorithm trigonometric functions, basic principles, Cordic algorithm FPGA-based 32-bit pipelined architecture, the solution to the efficiency of the trigonometric functions 200 times, shortening the navigation algorithm execution cycle to improve the real-time nature of the navigation computer. The uC/OS- Ⅱ embedded operating system task planning and management platform based on the basic principles of navigation algorithm to achieve each sub-sensor data acquisition, multi-point measurement to solve heading angle, GPS coordinates conversion and strapdown navigation algorithm, error model for each sub-navigation system and federal filter neutron filter system of equations. Micro integrated navigation computer design to achieve the desired goal, and has been successfully used in autonomous navigation smart car \

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio navigation > Navigation systems of the various institutional > Complex navigation systems
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