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Research on Testing Structure Automatically Building in IC Technology

Author: HuXiong
Tutor: ShiZuo
School: Zhejiang University
Course: Circuits and Systems
Keywords: Test Structure Yield Defect Automatically
CLC: TN407
Type: Master's thesis
Year: 2010
Downloads: 34
Quote: 0
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Abstract


In the past few decades, the rapid development of microelectronic technology, and a variety of electronic applications makes the increasing scale of modern IC systems, increasing complexity of integrated circuit manufacturing technology challenges. Design for manufacturing integrated circuits was introduced at this time domain, the design for manufacturing and IC system size and complexity of the common requirements, the test is applied to a larger field of integrated circuit technology, increasing its importance . In the IC into deep submicron and nanometer era, test structure for testing are becoming more complex, a wide range of uses are varied. IC manufacturers in the test on the increasingly high cost, especially in large-scale testing to establish the time when the territory of the cost and manpower costs. This article presents a different approach with the traditional territory of the establishment of large-scale testing methods - yield test layout automatically. This method uses a hierarchical parametric approach to build a single type of test structure template, and then use the template instantiation of large-scale complete the entire test process, the whole process is implemented using software. When the build template structure, there are two important ways, one is set to control the properties of graphic elements graphic element size, shape, and position level. Second, the relative position of a graphical element to control the constraints relative positions of different graphic elements, so that the selected graphic element after a reference position of the other graphical elements are all determined. After the structure has a template template structure only need to be assigned to all parameters, to achieve the whole process of the software will automatically use the template structure conceived values ??of all groups structure to achieve out to achieve rapid test yields territory to achieve the purpose. This method has three significant advantages: 1. Template structure built when level of clarity, not prone to error; 2. Workload greatly reduced, saving time cost; 3 when requirements change when change is easier territory. This combination of engineering practice then proposed a new test polysilicon stringer structure defects, and the use of automatic methods to achieve its designed test structures on the 0.11um copper production process, after the test has discovered a new test structure Indeed better performance, and find a cause of this defect factors obtained new design rules of this process, the production line to improve the yield of products play a good effect. This also fully verify the feasibility of this method and the high efficiency of this method.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Testing and inspection
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