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Research and Design of high-speed high - precision digital-to-analog converter

Author: FangSheng
Tutor: HongZhiLiang
School: Fudan University
Course: Microelectronics and Solid State Electronics
Keywords: Digital-to-Analog Converter High speed High-precision Self-calibration From the zero
CLC: TN792
Type: Master's thesis
Year: 2010
Downloads: 247
Quote: 1
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Abstract


As semiconductor technology continues to evolve , the digital-to-analog converters have been widely used in audio signal processing , and digital integrated wired and wireless communications . As the interface of the digital world and the analog world , digital-to-analog converter increasingly shows its importance. The traditional digital-to-analog converters are mainly used in the time domain , such as a high-resolution display , an audio signal processing . These high-resolution digital-to-analog converter has a certain role in promoting. With the development of digital modulation techniques , digital-to-analog converter has been increasingly applied in the frequency domain . For these applications, the digital-to-analog converter as the transmitter baseband the demanded output signal in the adjacent channel does not generate harmonic . Today , high-speed high - precision digital-to-analog converter focus of the study is not only to make the DC accuracy to meet the requirements , but also meet the requirements of dynamic performance . In this thesis, 14 , the clock frequency of 100MHz digital-to-analog converter study design . Background self-calibration technology to achieve 14-bit precision , high current source . Due to the high current source is a floating structure , in the normal working current source measurement , without having to replace it , reducing the complexity of the circuit design . Background calibration , correction of the deviation of the current source manufacturing process , to ensure a constant output current . The output stage folded structure, improve the output swing ; while the output current into the load by cross-coupling switch , appearing at the output from zero to reduce the impact of the switch on the output waveform . In the digital input section , a data - independent clock loads structure , regardless of the switch data change or not to change , the clock load is constant , thereby reducing the occurrence of clock jitter and improves the dynamic performance . Semiconductor Manufacturing International Corporation ( SMIC ) 0.13 process , the entire chip to achieve chip area of ??2mm × 2mm . 1.2V/3.3V hybrid power , the digital part of the power supply is 1.2V, the analog part to 3.3V . The total power consumption of 50mA. The measured differential nonlinearity 3.1LSB integral nonlinearity 4.3LSB . When the clock frequency of 50MHz, input signal frequency of 1MHz , the measured spurious-free dynamic range (SFDR) of 70.91dB .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Digital-analog , digital to analog conversion circuit
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