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Dither DEM calibration technique based on 14-bit 150 mega samples / sec pipelined ADC

Author: LinKaiHui
Tutor: RenJunYan
School: Fudan University
Course: Microelectronics and Solid State Electronics
Keywords: ADC Assembly line Digital background calibration Buffer Capacitor mismatch Op amp gain error
CLC: TN792
Type: Master's thesis
Year: 2010
Downloads: 222
Quote: 3
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Abstract


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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Digital-analog , digital to analog conversion circuit
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