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Multi-function HASH IP Core Design Based on SOC and Its Application in USB KEY

Author: TanYongWei
Tutor: ZhouYuJie
School: Shanghai Jiaotong University
Course: Circuits and Systems
Keywords: HASH MD5 SHA1 HMAC IP Core SoC ASIC USB Key
CLC: TN47
Type: Master's thesis
Year: 2009
Downloads: 41
Quote: 2
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Abstract


This paper mainly presents the ASIC design of HASH IP core. HASH is an important algorithm in crypotology which has been widly used in information security field such as electronic business. The IP core mentioned in this paper is a SoC design and could be applied to medium-end or low-end cryption devices, like USB Key, Smart Card, POS machine and so on. So the design target is to achieve a multi-function, small area, high performance algorithm engine with a bus interface to be adapted in SoC design. The HASH IP core combines MD5, SHA1, HMAC algorithms in one with C*Core IP Bus interface and is implemented as an ASIC IP core in SMIC 0.18um process. Firstly, the algorithms including MD5, SHA1, HMAC are analyzed in the paper. Second, the hardware circuit with optimized performance and shared resource is implemnted in HDL. Third, the design is fully tesed through function simulation and FPGA verification. Fourth, the design is synthesized and verificated for pre-layout. Finally, the layout is completed after backend design. Besides, the application of USB Key is also presented in this paper which shows the value of HASH IP core in real enviroment.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
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