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Charge pump measurement methods and the reliability of simulated tunneling transistor

Author: HuangXinYun
Tutor: HuangDaMing；LiMingFu
School: Fudan University
Course: Microelectronics and Solid State Electronics
Keywords: metal oxide semiconductor field effect transistor (MOSFET) technology computer aided design (TCAD) reliability charge pumping (CP) tunneling field effect transistor (TFET) bias temperature insteability (BTI) hot carrier effect (HCE) interface trap generation oxide charge traping
CLC: TN386
Type: Master's thesis
Year: 2010
Downloads: 73
Quote: 0
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Abstract


By numerical calculation, Technology Computer-Aided Design (TCAD) tools can let us examine the working process of semiconductor transistors in a virtual way. This is useful in analyzing the working principle of transistors, studying transistor reliability, and exploring ways to improve device performance. In this thesis, we apply TCAD tools to investigate MOSFET reliability and measurement methods.First, we introduce the TCAD device simulation tools, ATLAS and Medici, by simulating the Id-Vg curve of conventional MOSFET. We explain the simulation input file and the commands in detail. Then, we use the TCAD tools and Matlab software to simulate the charge pumping (CP) experiment. We present a diagramatic method to explain the CP process and measurement results. Combining with simulation results, we explain the physical details of CP process in a single diagram. We also use the simulation results and diagrams to explain the principle and results of the modified CP used in recent reliability investigations. Finally, we use the TCAD tools to simulate the characteristics of tunneling FET (TFET) and compare the reliability issues with traditional MOSFET. The simulation shows that the Id degradation of TFET is mainly due to the existence of the interface traps and oxide charges within the 10nm region near the tunneling junction. A comparison with experimental results also shows that the interface trap generation is able to explain the Id degradation under bias temperature stress while the oxide charge traping is able to explain the Id degradation under hot carrier stress.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Semiconductor technology > Field-effect devices
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