Dissertation > Excellent graduate degree dissertation topics show

Embedded video decoder motion compensation process data layout optimization

Author: WangHengWei
Tutor: GuoHongXing
School: Huazhong University of Science and Technology
Course: Computer System Architecture
Keywords: Embedded Systems Stream Computing MPEG-4 Video Decoder Notes type memory Data layout
CLC: TN919.81
Type: Master's thesis
Year: 2011
Downloads: 7
Quote: 0
Read: Download Dissertation

Abstract


And to improve the performance of embedded systems while reducing energy consumption in various areas of applications has become a research hotspot problem, for data-intensive multimedia applications is particularly important, so specifically for multimedia applications, the digital signal processor (DSP) is increasingly the more and more used in embedded systems. In order to reduce the calculation speed of the embedded system and data access speed difference , the use of on-chip memory notes formula (ScratchPad Memory, SPM), and the layout data in the SPM optimized to improve the performance of embedded systems , while reducing energy consumption purposes. Ensure the video quality and timeliness of the premise, the idea of ​​combining flow calculation , presented a motion compensation process for the data layout optimization. In SPM set a ping-pong buffer storage structure, the motion compensation by prefetching required data stored in the way of this buffer. Calculated using the side edge of the flow calculation idea accessed in a macroblock for motion compensation while the subsequent motion compensation using the data needed to replace the ping-pong buffer is no longer needed in the data to improve the data multiplex chip rate, reduce memory access times. Meanwhile, data indexing algorithm to access the required data for motion compensation . The entire program by improving data processing and data access parallelism to improve performance while reducing power consumption. Based on TI's TMS320DM642 platform to MPEG-4 video decoder for the study, during the motion compensation data layout optimization, respectively CIF format different from the standard sequence for testing. Experimental results show that the optimized MPEG-4 video decoder decoding performance increased by an average of 6.7% , the whole process of decoding the DM642 chip secondary cache energy consumption reduced by an average of 18.5% . In addition, two of the actual cache miss rate decreased by 1.94% , and the relative loss rate before optimization declined by 31.8% . Thus, the data for motion compensation process optimization can indeed improve performance and reduce energy consumption. This research was supported by the National Natural Science Fund Project: embedded multimedia stream computing adaptive mechanism and cross-layer optimization ( ID: 60873029 ) and Huazhong University of Science Innovation Research Fund ( ID : 2010MS014) support.

Related Dissertations

  1. Borehole imaging device based on embedded systems research,P634.3
  2. A Project about Intergrative Control System of Elevator Drive and Power Feedback,TP273
  3. Study of Intelligent Control on Power Phase Test Technology,TP368.1
  4. The Wireless Virtual Storage System Based on WiFi,TN929.5
  5. Research and Implementation of the Techniques of Embedded Network Video Applications,TP368.1
  6. Modular Design and Implement of a Small Mobile Robot System Platform,TP242
  7. Study on Instrument Calibrator for Diesel Engines and Its Integrated Information Management System,TK426
  8. Development of Smart Sensor Network System Based on CAN Bus,TN929.5
  9. The Design of a New ARM Experimental Device Which Bases on Chip of S3C2410A,TP368.1
  10. Research on Porting of Embedded TCP/IP Stack TINET,TP368.1
  11. Design and Implementation of a Three-dimensional Widget Set,TP391.41
  12. Research and Implementation of Embedded Network Video Software,TP393.09
  13. Research of Automatic Code Generation Technique for Embedded System Graphic User Interface,TP368.1
  14. TD-SCDMA wireless network performance monitoring terminal design and implementation,TN929.533
  15. High-speed transmission for lossless video embedded Gigabit Ethernet Access Technology,TN915.6
  16. ARM Embedded System for H.264 decoding research,TP368.1
  17. Based leon3 processor's memory monitoring module design,TP368.1
  18. Interactive Design and implementation of real-time classroom,TP311.52
  19. Embedded systems hardware anti- buffer overflow attacks defense mechanism,TP393.08
  20. Based on DSP and CPLD design and implementation of motion control card,TP273
  21. Based on Embedded Technology patch clamp data acquisition system hardware design,TP274.2

CLC: > Industrial Technology > Radio electronics, telecommunications technology > Communicate > Image communication, multimedia communication > Image coding
© 2012 www.DissertationTopic.Net  Mobile