Dissertation > Excellent graduate degree dissertation topics show

Based on embedded multicore processors and disruptions of the communication

Author: KongShuaiShuai
Tutor: LuoKeLu
School: University of Electronic Science and Technology
Course: Computer System Architecture
Keywords: Multicore PB11MPCore Multicore start Interrupt
CLC: TP332
Type: Master's thesis
Year: 2011
Downloads: 142
Quote: 0
Read: Download Dissertation

Abstract


Microprocessor performance improvements over the years was largely based on a single processor clock speed or improve instruction-level parallelism degree , with the chip power consumption intensifies, Moore's Law will become increasingly ineffective. Currently , both the industrial sector or academia are turning to the multi-core processor architecture , multi-core architecture provides powerful processing speeds. Today, the computer 's ability to achieve a multi-core processing , which means that the computer can really achieve parallel processing. Multi-core processors become the mainstream of development. In the field of embedded multi-core processor-based applications is currently embedded systems development is a hot issue . PB11MPCore is a based on ARM V6 architecture, with four ARM11 MPCore processor development board The board borrowed from the Northbridge and Southbridge X86 platform concept , its functions are implemented using ASIC and FPGA . PB11MPCore development board is an ARM-based SMP architecture of a highly integrated hardware and software development platform . It offers self- ATX chassis housing supply. PB11MPCore development board as a fast multi-processor hardware and software development platform, equipped with four ARM11 MPCore processor and a speed close to the ASIC storage systems. Heap built on the substrate using FPGA-based RealView Logic Tiles, allowing customers AMBA3 peripherals, processors and DSP easily be added to existing ARM development board. In this thesis, PB11MPCore development board architecture were introduced, especially for the interrupt system, the principle is analyzed in detail . Based on the development board , the thesis respectively multicore start and interrupt system was designed and implemented . Introduced the system boot process , to achieve the main core and sub- nuclear inter- interrupt sequentially through the nuclear launch ; were stratified on the interrupt system , respectively, to achieve a hardware-related layer and kernel layer, and finally the nuclear inter- interrupt achieved.

Related Dissertations

  1. Research on Algorithm of Parallel Copying Garbage Collection Based on Lisp 2 for Multicore System,TP332
  2. Research of High-Performance Packet Capture Mechanism in Linux Environment,TP393.08
  3. Research on Acquisitive Prescription System,D923.1
  4. The Beginning of Unofficial Diplomatism Between China and Japan,K27
  5. A Study of Amdahl’s Law Performance Model on Asymmetric Multicore System,TP338.6
  6. Resarch of Task-level Data Processing Based on Multicore CPU and Test of Its Performance on Cluster Platform,TP274
  7. TilePro64 multicore processors based H.264 HD video decoding software design,TN919.81
  8. Based on multi-core SMP cluster environment parallel ray tracing simulation of satellite imagery and Implementation,TP391.41
  9. Multi-core processor based on RSA Research and Implementation of Parallel Algorithms,TP309.7
  10. Combination of multi-core based on the generalized Gaussian image classification method,TP391.41
  11. Multi-core parallel cluster environment GeoComputation execution time prediction technology research,TP338.6
  12. Front of the flow based on shared key technology of multi-core architecture,TP332
  13. Core temperature for the public perception of the Linux scheduler Research and Implementation,TP316.81
  14. Study on Program Real-time Model Checking Method Based on WCET Analysis Technology,TP311.52
  15. Short-term Urban Traffic Forecasting Based on Multi-kernel SVM Model,U491.14
  16. Water Carriage of Goods by the legal system of the Limitation of Actions,D922.294;D923.1
  17. EFI-based software model of heterogeneous multi-core systems and its security applications,TP316
  18. FCM combines multi-resolution image cone multicore parallel image segmentation algorithm,TP391.41
  19. Fault-Tolerant Routing Algorithms for 2D-MESH Based Network-on-Chip,TP302.8
  20. LDPC decoder, the realization of research,TN911.22
  21. Some Tardiness Problems with Machine Disruption,O223

CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
© 2012 www.DissertationTopic.Net  Mobile