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Data acquisition and processing technology is an important branch of computer applications, research data collection, storage and processing. Most of the traditional data sampling and monitoring device is based on the ISA bus due to the limitations of the hardware resources and speed, whether sampling accuracy or range of applications are subject to a lot of constraints. Thus, the introduction of this thesis, this computer-based high-speed bus, use Field Programmable Gate logic control of high-speed, high-precision, high-flexible data acquisition and processing technology. In order to meet the requirements of the design of military equipment at the same time, we also introduced the design technology of the resistance to harsh environments. Provides a good solution for the design of high-performance data acquisition and processing module. CPCI bus is a high-speed, high-reliability, high open a new generation of computer bus. CPCI the introduction of the local bus, to break the bottleneck of the data transmission, with excellent performance to become the mainstream of the microprocessor bus, and has been widely applied in various fields of engineering, a bus standard is very competitive. Digital logic design to match the the CPCI bus protocol very complex, it is very difficult to control circuit. The CPCI interface used to achieve effective program mainly in two ways: using a programmable logic device CPLD or FPGA and a special interface chip. FPGA field programmable gate array, its main feature is the through different programming data can produce different circuit functions. Development of FPGA technology to make up for the lack of discrete components in the layout space and debugging modify using the technology of online programming, hardware description languages, the the repeated FPGA chip design improvements, the hardware circuit design really has high flexibility, high integration features. As part of a Navy carrier-based project, the design must meet the requirements of the use of military equipment, so we designed on resistance to adverse environmental design technology. From circuit design, PCB design to structural design, the entire module design process, we confront the high and low temperature, vibration, EMI, hot and humid harsh environmental elements are design considerations to meet the design requirements, and after the actual test. In this thesis, the completion of a special interface chip PCI9052 programmable data acquisition and processing circuit design, and the successful completion of the PCB production. VHDL Design improvements to complete the programming of the FPGA chip, eventually after driver verification and test procedures. In this thesis, mainly from the two parts of the hardware circuits and software development design. Among them, the hardware circuit design including the CPCI bus design, FPGA chip control design, the FIFO storage design, data conversion design; software development and design, including FPGA timing control design, the design of the hardware driver code, test software application design.
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