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CCD image sensor readout circuit Research and Design

Author: LuoYan
Tutor: LiJingChun
School: University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: CCD readout circuit Reset noise Operational amplifier Correlated Double Sampling
CLC: TP212
Type: Master's thesis
Year: 2009
Downloads: 497
Quote: 6
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Abstract


The CCD image sensor readout circuit is the interface between the CCD sensor and subsequent digital signal processing circuit, and its role is a weak signal, and amplifying the output of the CCD device to filter out various noise. The performance of the readout circuit determines the accuracy of the CCD system as a whole. With the the CCD device speed and the continuous improvement of the number of pixels, requires readout circuit has a higher speed, lower noise, greater dynamic range, as well as more features monolithically integrated. Studied a monolithic integrated CCD readout circuit, the preamplifier is designed, the low pass filter and the correlated double sampling three sub-module circuit. Accuracy, speed and noise in the design process to explore the various sub-module of the theoretical model and the corresponding circuit Realization UMC 0.18μm CMOS process designed readout frequency of 2MHz accuracy of more than 10 of the CCD image The sensor readout circuit. The main contents include the following aspects: 1) the system elaboration and analysis of the the CCD device structure and the noise generated, the focus for the dominant component in the noise output reset noise and derived the expression of the reset noise changes over time, analysis of the correlation and calculate the correlation coefficient of the reset noise. Based on the correlation of the reset noise, the use of correlated double sampling circuit to reduce the reset noise. 2) based on the pre-amplifier structure, analysis of the factors that affect the the preamplifier accuracy and speed, such as finite gain, finite bandwidth, noise and offset voltage op amp. Derived through analysis, the indicators for the readout circuit of the op amp. Simultaneously read out based 2MHz frequency and correlated double sampling to suppress the noise requirements, determine the-3dB bandwidth of the low pass filter. 3) is designed for the CCD readout circuit of each module of the operational amplifier, including the drive low impedance with the output stage of the op amp for the ordinary op-amp buffer isolation. The op amp design process and the noise and offset voltage is derived by optimizing the parameters to minimize noise and offset voltage. The simulation results, the op amp gain of 78dB, unit gain bandwidth of 30MHz, phase margin of 58?, Designed to meet the system requirements. 4) to derive the system function correlated double sampling. The design of two correlated double sampling circuit analysis correlated double sampling circuit in the charge injection error, through analysis and simulation results show that the second error correlated double sampling circuit 10 accuracy down to a minimum, meet the system requirements. 5) based on the UMC 0.18μm CMOS process, design simulation of the readout circuit, the power supply voltage 3.3V for the CCD image sensor, reading out a frequency of 2MHz, the maximum output signal is 1V. Simulation results show that the readout circuit signals a magnification of 5 times. Accuracy of 0.4mV to 1V full scale signal accuracy to meet more than 10.

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