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The FRC algorithm TFT-LCD and Implementation

Author: ZhangPengCheng
Tutor: WangJunYu
School: Fudan University
Course: IC Engineering
Keywords: Frame rate control Shake Flicker Double matrix Dual-channel
CLC: TN873.93
Type: Master's thesis
Year: 2011
Downloads: 69
Quote: 0
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Abstract


With the rapid development of information industry , access visual information exploding . LCD technology is gradually replacing the traditional CRT monitors, the primary display device in everyday life . Research on low - cost , high-performance liquid crystal display technology has high academic value and broad application prospects . A wide variety of liquid crystal panel , the most common is a TN panel , which is one of the most economical and practical consumer products , low cost, rapid reaction . TN panels are generally six panel , said the R , G , B three kinds of color , but can not fully show 16.7M colors output from the graphics card , the need to adopt a variety of color enhancement technology color enhancement technology is the use of human visual inertia show more color data to the maximum extent . E.g. using a dithering algorithm , the integration of several adjacent pixels , in order to show the desired gradation , or using a frame rate control method , which is every frame cycle time based on the processing techniques , show different degrees TIK color , to display an intermediate gradation . In this paper, these two methods are called FRC algorithm , TN and board color enhancement technology can show 16.2M colors . Using the traditional FRC algorithm prone to fixed mode and flicker noise . How to adopt a simplified circuit traditional FRC algorithm to eliminate the above disadvantages is the focus of this thesis . This article describes the traditional color enhancement technology, the basic principles and VESA timing standards , simplify and improve the traditional color enhancement technology DMDC FRC algorithm . The algorithm uses a two - channel color data input, the data processing speed . Rotation using the dither matrix , not only to eliminate the flicker noise , but the algorithm is simplified circuit , to reduce the chip area . Use the Verilog hardware description language description of the circuit to complete the function of the circuit simulation and FPGA verification . The verification results show , DMDC FRC algorithm eliminates the massive effects and flicker noise , and reached the design requirements of the project .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio equipment,telecommunications equipment > Terminal equipment > Display device,the display > LCD monitors
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