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Research on the Implementation of Algorithm of Public-Key Cryptography Based on Reconfigurable Hardware

Author: WenMing
Tutor: WangYouRen
School: Nanjing University of Aeronautics and Astronautics
Course: Measuring Technology and Instruments
Keywords: Public key cryptography RSA Elliptic Curve Cryptography Modular arithmetic Reconfigurable hardware Array processing architecture
CLC: TN918.1
Type: Master's thesis
Year: 2008
Downloads: 82
Quote: 1
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The rapid development of high-density FPGA - based reconfigurable computing , which combines a wide range of applications based on microprocessor software is flexible and adaptable and dedicated ASIC hardware processing efficiency has been achieved in the field of information processing . The core of the modern information security cryptographic algorithms , the paper studies two typical RSA and elliptic curve cryptography ECC public key cryptography algorithm reconfigurable hardware design . The main research work includes : ( 1 ) analysis of the RSA and ECC algorithms explore key technologies algorithms implemented in hardware ; ( 2) for the processing of cryptographic algorithms with high computing intensity and characteristics of the computational complexity , designed array processing structure , core computing algorithm to calculate the structure of space mapping constitute the array , parallel pipelined processing architecture , matching password algorithm computing model , and strive to achieve the best match of the algorithms and hardware processing architecture . Experimental results show that can get the high parallel processing ability and computational efficiency ; (3) In this paper, a configurable RSA cryptosystem design and detailed design of the various functional modules ; improved Montgomery modular multiplication algorithm achieved mold a median of 64, 128, 256, 512 - bit data encryption ; different mold median key length processing speed of decryption system can support , can adapt to different application requirements ; (4 ) to study the finite field GP (2m ) the ECC core computing modules : mold on the finite field multiplication modulo multiplication algorithm fast computing as well as group operation layer ; mapping and core sub- algorithm on reconfigurable hardware realization . Analysis and validation results showed that the the correct ECC design features ; (5 ) based reconfigurable hardware experimental platform design encryption and decryption of RSA and ECC public-key cryptosystem hardware system , and results from the encryption and decryption , computing the required clock frequency and speed , as well as hardware resources , system performance evaluation.

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