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The Research and Design of Hardened Encryption Card Based on FPGA
Author: ZhengYuanJiu
Tutor: LiuQuan
School: Wuhan University of Technology
Course: Communication and Information System
Keywords: VPN network processor PCI bus Date Encryption Standard Pipeline design
CLC: TP309
Type: Master's thesis
Year: 2005
Downloads: 514
Quote: 6
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Abstract
With the development of Internet and the network application, the network security problem is becoming one of the problems that people cannot ignore. So the research of VPN (Virtual Private Network) security gateway is becoming white hot for its well done to network security problem. But if the VPN security gateway wants to be applied to market, it has to face the bottleneck between the fast speed of network transport and the relative slower speed of network data processing. The prime object of this project, by which this paper is supported, is to provide a secure, credible, and high speed VPN gateway for E-government and to fit for the development of network bandwidth.Based on the research and analysis of several related VPN resolves, this paper brings forward an embedded gateway solution based on the network processor IXP425 and a hardened high speed encryption card. This solution separates the data encryption task from the main CPU. It resolves the conflict well between the network switch and encryption processing, and highly improves the gateway security performance and process speed. The design of hardened high performance encryption card based on PCI local bus both resolves the speed bottleneck problem and it also can be used in other encryption processing.This paper describes the hardware design of the encryption card and it emphases the FPGA design and optimization of DES/3DES arithmetic. Based on the analysis and study of these arithmetic principles, a kind of pipeline flow is designed to get the liner output of encrypted data, and this flow can highly optimize the performance. Based on the characters analysis of FPGA products from Altera Inc., the double-case structure of program language is designed to optimize the resource area. And further based on the advantage of FPGA design, some measures such as burr processing are used to synthesize and optimize the arithmetic. All these help the encryption speed of the whole encryption arithmetic satisfying the demand of the whole system, this can establish the base of the implementation of the whole high performance encryption card, and also it ensures the realization of the high speed VPN gateway.
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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > General issues > Security and confidentiality
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