Dissertation > Excellent graduate degree dissertation topics show

Research on the Hardware-Software Code Partition Technology of Reconfigurable Computing Systems

Author: LiuTaoGang
Tutor: ZhaoRongCai
School: PLA Information Engineering University
Course: Computer System Architecture
Keywords: Reconfigurable Compiler Hardware-Software Partition Pipeline Loop Unroll Date Reuse Design Space
CLC: TP332
Type: Master's thesis
Year: 2010
Downloads: 33
Quote: 0
Read: Download Dissertation

Abstract


As an effective technique to solve software transplantation and simplify application design,reconfigurable compiling has become an integral part of reconfigurable computing systems. Hardware-software code partition technology, which divides the code into the appropriate processing unit of reconfigurable platform to enhance the processing performance of reconfigurable platform, is one of the most important research topics of reconfigurable compiling. It needs to consider characteristics of the program code and features of reconfigurable hardware comprehensively to acquire accurate parameters of the performance of executing. However, it is hard to predict the hardware performance of code segment, especially the nested loop as the performance differences of hardware circuit converted by different design method, are very distinct. It is a difficult problem to find out a good partition method. In this thesis, we design a loop body as pipeline, combining the characteristics of FPGA, which is depth parallel pipeline.An optimizing hardware circuit design method is proposed, which considers the important factors affecting the performance of reconfigurable hardware circuit. Using the proposed performance evaluation model of reconfigurable platform, it can effectively guide the software and hardware partition. The main contributions of the thesis are as follows:1. An optimized pipeline partition method combined with the deep parallel pipeline of FPGA is proposed. It takes maximum clock frequency of pipeline, clock delay in different pipeline step and the interval of adjacent circle. Our experiments show that the method can improve clock frequency and reduce pipeline interval time;2. A design space search method under hardware resource constraints combined the optimized method of loop block and loop unrolling is proposed. The proposed method can improve the parallelism and data reuse. Our experiments show that the method can reduce external memory access and achieve multi-pipeline parallel, thereby reducing the hardware execution time.3. An improved simulated annealing algorithm is applied to the design space search model. Our experiments show that the algorithms can search near optimal circuit design in a short time.4. A parametric hardware execution time evaluation model is designed, base on the analysis of the main factors which impact the performance of reconfigurable hardware circuit. Our experiments show that the proposed model can effectively guide the hardware-software code partitioning.

Related Dissertations

  1. Design and Implementation of Processor TI DSP VC33 Virtual Kernel,TP332
  2. Temperature and Pressure Drop Analysis and Its Application in CO2 Corrosion Evaluation of Subsea Pipeline,TE832
  3. S-lay Installation Analysis for Deepwater Pipeline,TE973
  4. Research on ASP Flooding Oil Pipeline Ultrasonic Eliminating Scale Technology,TE39
  5. Research on Subsea Pipeline Repair Coupling,TE973
  6. Mechanical Manufacturing Enterprise Production Planning System Optimization Design-take NBZC for Example,F426.4
  7. Comparative judgment research design patent infringement,D923.42
  8. Geographic information systems design and development of urban underground pipeline,TP311.52
  9. Match Design of Indoor Textile Apply Inroom,TS105.1
  10. Petrochemical projects in the pipeline construction management information system design and implementation,TP311.52
  11. Study of the Effect of High Voltage Transmission Lines on Buried Metal Pipeline Corrosion,TE988
  12. Research and Implementation of Jobs Intelligent Dispatching System for a Kind of Hyrbid Assembly Lines,TH186
  13. Design of Vacuum Sewage Control System and Study on Pipeline Water Blocking Prevention Technology,TU824.2
  14. Construct and Present the Traditional Image in Chinese Contemporary Architectural Design,TU-0
  15. A * algorithm based on multi- channel pipeline laying method of automatically,TN05
  16. Scheduling Method of Hybrid Flow Shop Based on Theory of Constraint,F273
  17. Slurry pipeline transportation system, process monitoring and fault diagnosis,F426.1
  18. TilePro64 multicore processors based H.264 HD video decoding software design,TN919.81
  19. Heating based on active monitoring technology subsea pipeline vacant,P756.2
  20. Pipeline detector positioning method of inertial navigation,TN966
  21. Submarine pipeline and the sea bed soil interaction finite element analysis,P756.2

CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
© 2012 www.DissertationTopic.Net  Mobile