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Network processor packet classification engine design

Author: GuanAiFang
Tutor: GaoDeYuan
School: Northwestern Polytechnical University
Course: Computer Science and Technology
Keywords: Network Processor Packet classification Classifier Packet Classification Engine Tuple space
CLC: TP332
Type: Master's thesis
Year: 2007
Downloads: 227
Quote: 1
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Abstract


With the development of the Internet and new technologies continue to emerge , and the growing requirements of the intermediate network switching equipment , network switching equipment must not only has high speed but also has a high degree of flexibility , and thus was born a dedicated processor to process network transactions - network Processor (NP). New network applications such as packet filtering, differentiated services , quality of service , multicast , flow meter , etc. , are needed NP classify packets arrive . Packet classification has become a key operation in the network processor . The subject of this thesis comes from preliminary research undertaken by the Aviation Microelectronics Center , Northwestern Polytechnical University : research and application of high - performance network processor , the research topic , the author is primarily responsible for the analysis and design of NP packet classification coprocessor . The main research work includes : 1 . Research and analysis of network processor architecture and its development trends , related technology research and analysis, packet classification and packet classification algorithm to divide and performance . 2. Vector folded thinking tuple space packet classification algorithm based packet classification algorithm , an improved design based on : the tuple vector folding algorithm TFV. 3. Research and analysis, hardware packet classification engine based on the multi- domain decomposition package classification algorithm AFBV , for hardware design of a the classifier construction program packet classification , and packet classification engine based on the design of the classifier model . 4. Write VerilogHDL code this the classification engine model simulation and analysis of its performance .

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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