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Design and Verification of X Microprocessor’s Segmentation
Author: ZouYang
Tutor: FangLiang
School: National University of Defense Science and Technology
Course: Software Engineering
Keywords: Memory management unit Sub- components Linear address Adder Register Storage protection
CLC: TP332
Type: Master's thesis
Year: 2006
Downloads: 14
Quote: 0
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Abstract
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In the high performance general purpose microprocessor , the memory management unit is a very important function unit . Virtual storage technology , it can greatly improve the microprocessor memory range, and increase the flexibility and reliability of the microprocessor in the storage management . Sectional member is a memory management unit in the most common and most important one of the arithmetic unit , one hand to achieve the logical address to a linear address calculation , on the other hand the whole segmentation process memory protection , both have an important impact on processor speed and reliability . In-depth analysis of the papers on the sub- components of the overall structure and the function of each module structure , and in the study on the basis of its instruction set , designed to achieve a high-performance components segmented storage ; also uses related authentication method , the completion of a multi-level simulation and verification ; Finally , still in the structure proposed and implemented an improved design . The tapeout validation : the segmented components have been successfully applied in the X microprocessor and can correct stable operation in the 300MHz frequency . The work and achievements of the topics include : 1 , in-depth analysis of the segmented architecture of the components and in accordance with the functional sub- components from the top level of the overall structural design and module division . 2 , the completion of a full-custom design of a high performance segmented parts . The segmented components in the core is a multi-channel 32-bit adder and storage protection module , this paper focuses on the design of the adder and storage module circuit protection , including half adder circuit , full adder circuit , boundary comparator circuit ; also register the segmented parts of the circuit design , a series of optimization improvements in accordance with their respective functions . In design at the same time , parallel to the sub- module level , module-level and system-level logic verification and circuit verification .
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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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