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Chip multi-threaded processor thread scheduling performance testing and optimization studies

Author: TangYiJian
Tutor: LiaoXiangKe
School: National University of Defense Science and Technology
Course: Computer Science and Technology
Keywords: Chip Multithreading Cache Failure Multicore Scheduling Resource allocation
CLC: TP332
Type: Master's thesis
Year: 2009
Downloads: 36
Quote: 0
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Abstract


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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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