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With the the semiconductor end products toward the short, light , digitized and integrated multifunction three trend , the status of the simulation of the field of power management ICs is becoming increasingly important , and become the main battlefield of competition semiconductor manufacturers . Important one as power management , low-dropout (LDO) linear regulator power management IC has become increasingly widespread in portable devices such as PDAs, MP3 players , digital cameras , wireless telephone and data network, equipment, etc. and is to keep the low-cost , low-power , low-noise , high efficiency , high power supply rejection ratio (PSRR) and the direction of development . Currently, most of the power management IC market foreign products occupy power management circuit products research and development , to recapture the huge market . Therefore , the research carried out in this project has a special significance . Designed a LDO [ low dropout ) linear regulator , it SMIC 0.35 - micron CMOS process design , and a wide input voltage range ( 2.5V -5V ) output voltage through a variable resistor partial pressure 1.8V, 2.5V , 2.7V , 2.8V 2.9V , 3.0V, 3.3V and 3.6V , in the case of the maximum load current (150mA) , the pressure drop of only 49mV. The circuit is mainly used as a power supply voltage of the RF circuit module (mobile phone) , therefore, a high power supply rejection characteristics and low noise characteristics of the indicators of the present design is most concerned . In addition, the design of overheating and over-current protection circuit to avoid the circuit is abnormal permanent damage of the chip . Based on the above technical advantages , the power management IC has superior characteristics of high efficiency , low power consumption , simple external circuit , greatly reducing the cost , at the same time strong system of adjustment of the load capacity and linear adjustment , the chip can be stable work under a variety of working conditions . In this article , first expounded the basic principle of the LDO linear buck regulator , the theoretical basis . Then , according to the function requires the design of the overall structure of the circuit . A detailed analysis of the circuit of all the sub-module circuit , complete with design software Cadence submodule circuit design and simulation, given reasonable circuit data , simulation data show the good performance of the chip design , to achieve each kinds of intended function and meet the requirements of default indicators .
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