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ESD Protect Circuit and Failure Analysis in Semiconductor IC

Author: WangZuo
Tutor: YaoSuYing;LiRiZuo
School: Tianjin University
Course: Electronics and Communication Engineering
Keywords: Electrostatic discharge electrostatic discharge sensitive device electrostatic discharge model electrostatic discharge protected area failure analysis technology of FA ESD FA
CLC: TN407
Type: Master's thesis
Year: 2009
Downloads: 214
Quote: 0
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Abstract


Electrostatic discharge (ESD) is a major cause of integrated circuit (IC) failures. Industry surveys indicate that nearly 40% of IC failures are associated with ESD/EOS (electrical overstress) phenomena. Therefore, the study and controlling of ESD are indispensable for achieving higher quality and reliability standards of IC chips. As technology continues toscale, ESD becomes more and more important and needs to be handled as a key problem inthe IC chips’ manufacturing and using.As an important process of improving ESD circuit design, failure analysis technology has a very crucial status in enhancing the IC relibility. Reliability physics is also gone by the name of failure physics, technology of failure analysis is ex-tremely important for reliability of digital IC. Failure analysis is more difficult, ad-vanced equipment and rational methods of failure analysis are needed because of the development of integration.This paper start with introducing gredients four kinds of ESD model in the electric industry: human body model (HBM), machine model (MM), charged device model (CDM) and field-induced model (FIM), dissertated the devices in common use in inside ESD protect structure, design of on chip ESD protect structure, design of layout and ESD process relativity detailedly. It also puts forward the idea of de-signing the ESD protecting area and the developing tread of ionizer. At the same time, EDX, SEM,SAM and Light-emission were performed to inspect and study many cases for explaining these methods in this article. Use the real FA case in manufacture as assistant, induced the best project of ESD failure analysis, accor-dingly settle the technical base for the synthetically ESD countermeasure of IC manufacturing in more searching and consummating steps.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Testing and inspection
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