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Implementation of GPS Synchronization Algorithm ASIP

Author: XuYuZuo
Tutor: YuMingYan
School: Harbin Institute of Technology
Course: Microelectronics and Solid State Electronics
Keywords: GPS Software Receiver Signal synchronization ASIP Explicit communication instruction set TRIPS
CLC: TN967.1
Type: Master's thesis
Year: 2010
Downloads: 49
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Abstract


Signal synchronization algorithms concentrated major amount of calculation of the GPS receiver software , the main function is completed receiving GPS IF input signal from the despreading demodulating the navigation messages of the GPS satellites used in the subsequent positioning solver . Synchronization algorithm to capture and track two stage capture stage of a three-dimensional search visible satellite number and its roughly C / A code the code partial and carrier Doppler shift ; tracking stage correction frequency offset and code generated partial and receiving signal synchronization of the local signal , so that the carrier and the C / A code from the input signal stripping, to obtain a final navigation message . The two stages of the correlator is the bottleneck to achieve real-time software receiver . As a compromise between the ASIC and the general-purpose processor , dedicated instruction set processor (Application Specific Instruction Set Processor, ASIP) both dedicated and flexibility . This paper studies the GPS signal synchronization algorithm and computational characteristics oriented GPS synchronization algorithm based on the Nios II embedded processor ASIP , explicit communication instruction set architecture TRIPS the ASIP options as other compilation optimization on the part of the synchronization algorithm based on the instruction set . ASIP performance of the two kinds of programs to analyze and compare , explore the ASIP - based GPS signal synchronization algorithm embedded real-time solutions . In this paper, the analysis of the acquisition and tracking algorithms core computing unit FFT / IFFT and Bit-Wise is to be optimized unit , a group of dedicated instruction is then extracted from the two units were based Nios II instruction extensions , thus completing the ASIP 's Nios II implementation , and board-level verification . FFT / IFFT and Bit-Wise two core computing unit , in order to get better performance in the TRIPS TRIPS assembler optimization . The performance parameters of the two kinds of ASIP final extract were analyzed separately , and using the normalized frequency of the two were compared . ASIP performance parameters by analyzing two kinds of programs , the more obvious advantages in processing GPS signal synchronization algorithm Nios II - based ASIP has relatively better performance , but the use of explicit communication instruction set architecture (TRIPS) .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio navigation > Navigation systems of the various institutional > Satellite navigation system
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