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Design of the Mixers for WLAN 802.11a/b/g/n Transceivers
Author: JiangYingDan
Tutor: LaiZongSheng
School: East China Normal University
Course: Microelectronics and Solid State Electronics
Keywords: High-speed wireless LAN Mixer Conversion Gain Linearity Noise Figure
CLC: TN773
Type: Master's thesis
Year: 2011
Downloads: 99
Quote: 0
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Abstract
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With the Tablet PC, smart phones, e-books and other handheld growing popularity of mobile communication devices, and Internet applications and the rapid development of electronic commerce, users need to connect to high-speed wireless network at any time. In the field of wireless local area network, the new emerging technologies and standards, on the one hand, in order to achieve a variety of standard rooms mutually compatible, flexible switching, multi-mode multi-band WLAN terminal continuous development; On the other hand, WLAN increasingly harsh channel conditions for the RF transceiver stage circuit design of a more demanding performance requirements. Based on 0.13μm CMOS technology, is designed to support four standard IEEE 802.11a/b/g/n, used in mixer WLAN transceiver circuitry, including the 5-6GHz and 2.4-2.5GHz band orthogonal two upper and lower mixer. The main results of this paper are as follows: (a) on IEEE 802.11a/b/g/n wireless LAN standard full study, based on the analysis of the WLAN transceiver system architecture and one of the mixer module performance indicators proposed design requirements; (2) proposed a quadrature mixer structure under active (patent pending: Complementary CMOS folding RF quadrature down-mixer, 201010190546.X), respectively supports WLAN 802.11a and 802.11b / g / n standards. The structure is based on the form of Gilbert folded structure, complementary transconductance stage using current multiplexing to increase the gain switching stage using current injection technology to reduce noise, on-chip input impedance matching network, the success achieved linearity, gain, noise performance of compromise between; (3) studied a stacked-type quadrature mixer structure on Gilbert, respectively, and supports 802.11b/g/n WLAN 802.11a standard, the focus of which cross the catheter, current injection pipe size and DC bias current for the mixer gain, linearity performance. Integrated on-chip output impedance matching network, convenient and post-stage RF power amplifiers or RF test instruments used in cascade; (4) using 0.13μm RF CMOS process flow sheet for the design of the mixer chip functionality and performance testing. 2.4-2.5GHz quadrature mixer conversion gain of approximately 4dB, IIP3 of 5dBm, noise figure of 11.2dB; 2.4-2.5GHz quadrature mixer conversion gain is greater than 3dB, OP1dB in 4dBm about noise figure 13dB; 5 -6GHz quadrature mixer conversion gain in 5.5dB above, Ⅱ P3 reach 11dBm, noise figure 12.8dB; 5-6GHz quadrature mixer conversion gain can reach 3dB, OP1dB about 2.5dBm, noise figure 17dB, meet 802.11a/b/g/n transceiver system performance requirements. This thesis by \) funding.
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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Multiplier, divider,inverter > Inverter, mixer
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