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For the standard of ISO18000-6C UHF RFID passive tag chip low-power design and implementation of digital integrated circuits

Author: HeYanLi
Tutor: WenGuangJun
School: University of Electronic Science and Technology
Course: Communication and Information System
Keywords: Radio Frequency Identification Tag chip ASIC design Low-power design Digital baseband circuit
CLC: TN431.2
Type: Master's thesis
Year: 2011
Downloads: 97
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Abstract


RFID technology RFID (Radio Frequency Identification) is an advanced automatic identification technology , has the advantages of non-contact , flexible read and write speed , distance , safe , widely used in logistics management , the merchandise sales management , product manufacturing public information services in many areas . With the rapid development of technology , the field of application of RFID is growing and becoming a fundamental technology of the modern information society building . Market demand for long - range RFID system for ultra-high frequency band (UHF) EPC Internet of Things propose and promote more and more urgent. In our country , the development and application of long-range passive UHF band electronic tag is in a stage of rapid development . China has gradually become one of the world's largest user of Things , the core technology of the UHF band RFID tag chip low-power technology is the Internet of Things technology . Therefore, this study will have great significance . This paper first introduces the research background of RFID technology as well as domestic and foreign research status quo and development trend . The article focuses on the principle of the power consumption of CMOS digital circuits and low-power design methods can be applied to CMOS digital circuits for RFID tag chip low-power design difficulties . Then, based on the low-power design considerations , ISO18000-6C protocol UHF passive electronic tags , low-power digital baseband circuit design . This paper analyzes the digital baseband circuit design of low-power system structure and discusses in detail the design and realization of the low power consumption of each core module , and using TSMC 0.18 um CMOS Mixed Signal Process process completed chip layout and tapeout . The test results show that the design to better meet the requirements of ISO18000-6C protocol label function and power index requirements to achieve the desired design .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > Semiconductor integrated circuits ( solid state circuits ) > Bipolar > Digital ICs, logic ICs
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