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A fast floating point adder Optimization

Author: FengWei
Tutor: JinXi
School: University of Science and Technology of China
Course: Microelectronics and Solid State Electronics
Keywords: FPU Floating point adder IEEE-754 Two-Path Algorithm Parallel misalignment Rounding merger Leading zeros Composite adder Barrel shifter
CLC: TP332
Type: Master's thesis
Year: 2009
Downloads: 201
Quote: 1
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Abstract


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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)
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