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Register file testability design and implementation
Author: DongFangYuan
Tutor: ZengXiaoYang;ShenBo
School: Fudan University
Course: IC Engineering
Keywords: Register file Design for testability 65nm Mixed analog-digital VLSI Implementation
CLC: TN407
Type: Master's thesis
Year: 2011
Downloads: 35
Quote: 1
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Abstract
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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Testing and inspection
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