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Research and Design of an 8bits 250MSPS Pipelined ADC

Author: XiGaiJuan
Tutor: LiuHongXia
School: Xi'an University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: Analog-to-Digital Converter Assembly line Sample / hold circuit Latched comparator Fully differential op amp
CLC: TN792
Type: Master's thesis
Year: 2010
Downloads: 121
Quote: 1
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Abstract


With the continuous development of the modern communication systems , portable consumer electronics and automotive electronics applications , high-performance , low-power , low-cost SOC has become the major trends in today's integrated circuit design . SOC development requirements of the analog-to-digital converters , and other analog circuits and DSP integrated on a single chip . Compatible with digital circuit technology , power, area and other indicators optimized high-performance analog - to - digital converter (ADC) is a very important element in the SOC . Therefore , based on the standard CMOS process , through structural studies to improve the speed , resolution and optimization of power consumption , area , and other indicators , is one of the important research direction in the ADC . The research and design of an 8-bit 250MS / s pipelined analog - to - digital converter . Mainly include mining Paul switched capacitor sampling , fully differential op amp gain circuit and two-phase clock control with a pre- amplifier latch comparator circuit design . The use of a capacitor plate sampling and fully differential architecture , it is possible to effectively eliminate the signal error caused by the sampling switch tube the charge injection effect and the clock feedthrough effect , improve the ADC linear degrees , SNR and conversion speed. 0.35-μm BiCMOS process , the performance of the circuit simulation . Converter at a sampling frequency of 250 MHz input signal frequency of 70.1MHz , can achieve about 46dB signal-to-noise ratio and -63.8dBc of spurious-free dynamic range . The power supply voltage of 3.3V , the nuclear part of the main body of the converter AD total power consumption of 118mW .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Digital-analog , digital to analog conversion circuit
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