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Integrated low-frequency oscillator and 12b 10MSPS Pipeline ADC design

Author: WangWei
Tutor: LanJiaLong
School: University of Electronic Science and Technology
Course: Circuits and Systems
Keywords: LFO Pipelined ADC MDAC Comparator
CLC: TN752
Type: Master's thesis
Year: 2008
Downloads: 168
Quote: 2
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Abstract


With the rapid development of digital technology, a variety of application areas demand for integrated circuits general trend is a high performance, low power, small size. This has prompted the chip circuit performance, low power consumption, small size of the study become imperative. In this paper, a low frequency oscillator improved, compared to conventional low-frequency oscillator to achieve low power consumption, small size, frequency stability. Instead of using triggers need to consume a large current op amp, but also solve the problem of temperature drift triggers that can stabilize the frequency has reduced the layout area. This low frequency oscillator used in ADC and sensors, flow sheet test results show that the oscillator is able to meet the system requirements. Meanwhile, the paper studies the 3.3V 12-bit 10MSPS Pipeline ADC (pipelined nature-based ADC) system architecture, pipeline structure to accommodate high speed and low power requirements, the entire ADC converter consists of 12 components, each level 1.5 bits. 1.5 bits was chosen because in each sub-class of the op amp only need a gain of 2, so you can maximize the bandwidth; addition, to reduce the requirements comparator offset error, making the comparator design is simple, low power consumption. This paper discusses the design and simulation of the Pipeline ADC and the analog circuit section includes a sampling circuit, a comparator, × 2 circuit of the first chapter of foreign ADC, including the main structure of the ADC, the use of fields. And describes the significance of this project. Chapter contrast commonly used in the industrial sector is currently low frequency oscillator structure design improves a traditional low-frequency oscillator, power consumption from the simulation contrast, layout area, and other design specifications. Chip test results show that the chip oscillator meets the system requirements. The third chapter introduces the principle of Pipeline ADC analyzed Pipeline ADC's main modules: the sample and hold circuit, CMOS switch, MDAC circuit (multiplying digital to analog converter). Analysis of the channel charge injection and clock feedthrough reason, and gives specific solutions. Analysis of how to choose the size of CMOS switches and CMOS switch on the circuit. Chapter IV analysis and simulation of PipelineADC specific circuit. First, the op amp to do a specific description, pointing out specific targets for the op amp from power, output range, gain, bandwidth and other aspects of the Miller compensated op amp comparison, telescopic op amp folded cascode op release. Analysis of the fully differential op amp, given the specific common-mode feedback circuit. In achieving high gain, high-bandwidth op amp when it was introduced in the case without reducing the bandwidth, increase the gain of the way - gain improved technologies. Compared with no gain to improve technology and the use of improved technologies gain op amp gain changes. Secondly, the introduction of the principle of the dynamic comparator, that the factors that affect the dynamic comparator, the comparator gives the dynamic simulation results. Finally, the sub-digital-analog converter circuit and non-overlapping clock. Chapter V describes the layout design tools, design principles and design steps. The territory is carried out under the JaZZBICOMS process. Gives the part of the circuit layout, from the example of the layout design should pay attention to the issue, including how to match, reducing noise, reducing process errors.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Oscillation technique,the oscillator > Oscillator
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