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Design of RF CMOS Mixer for 3G Application

Author: ZuoMeng
Tutor: ZhouRuPei；LiEnLing
School: Xi'an University of Technology
Course: Microelectronics and Solid State Electronics
Keywords: RF transceiver system Downconversion mixer A low noise amplifier Chip Spiral Inductors
CLC: TN773
Type: Master's thesis
Year: 2005
Downloads: 585
Quote: 1
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Abstract


In recent years, with the booming CMOS technology continues to progress , as well as wireless communications systems , research and development of low-cost , low-power CMOS RF system is a cause for concern . Now, the majority of the modules of a wireless transceiver system , such as the low noise amplifier (LNA), mixer (Mixer), the phase-locked loop ( PLL ) , a voltage controlled oscillator (VCO) , and a power amplifier (PA) are using CMOS The process to achieve the monolithic integration . The mixer is a key part of the RF system , its performance has a direct impact on the performance of the whole system , this thesis, the design of CMOS down-conversion mixer for WCDMA . First, in accordance with the requirements of the WCDMA RF transceiver system design a circuit diagram of the system downconversion mixer . Application of the TSMC 0.25um the model parameters , in the Cadence RF emulator circuit simulation, analysis and simulation results ; completion of a radio frequency ( RF ) , intermediate frequency (IF) and the local oscillator (LO) port match . Secondly, downconversion mixer layout generated in Cadence Virtuoso Layout Editor and layout design skills . Finally, in addition to the down-conversion mixer , the design of a low noise amplifier for WCDMA receiver systems to study the relationship between the individual performance of the LNA constraints and performance trade-offs and optimization .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Multiplier, divider,inverter > Inverter, mixer
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