Dissertation 

About 65 item dissertation in line with ChenShuMing query results,the following is 1 to 50(Search took 0.01 seconds)

  1. Researches on On-chip Parallel Data Access Techniques for SIMD DSPs with Very Wide Data Path,LiuSheng/National University of Defense Science and Technology,0/29
  2. The Design and Implementation of High-performance fixed-point Arithmetic Unit for SIMD DSP,LiGuoQiang/National University of Defense Science and Technology,0/17
  3. The Design and Implementation of High Performance EMIF and DDR2Interface on YHFT-Matrix Processor,ZengSi/National University of Defense Science and Technology,0/7
  4. Design and Implementation of H.264Algorithm Based on SIMD DSP,LiYong/National University of Defense Science and Technology,0/13
  5. Development of a RT-LAMP Method for Detection of Infectious Bronchitis Virus and the Screening of T Cell Epitopes from S1Protein,FanZuo/Shanxi Agricultural University,0/49
  6. Effects of Chicken Interleukin-18Prokaryotic Expression Protein to Immune Function in Chickens,LiuDong/Shanxi Agricultural University,0/12
  7. Effects of the Recombinant Eukaryotic Expression Plasmid pcDNA3.1(+)-ChIL-15to the Immunological Function in Chickens,HaoJie/Shanxi Agricultural University,0/37
  8. Study on Prokaryotic Expression and Antiviral Activity of Chicken Interferon-alpha,FengZongYang/Shanxi Agricultural University,0/0
  9. Effects of the Recombinant Eukaryotic Expression Plasmid pcDNA3.1(+)-ChIFN-α to the Immunological Function in Chickens,YangWenYan/Shanxi Agricultural University,0/0
  10. Study on the process of the sheet metal welding of high power solid-state laser,YangLei/Yangzhou University,0/27
  11. Compiler Design for VLIW DSP with Performance and Power Consumption Optimizations,HuDingLei/National University of Defense Science and Technology,0/273
  12. The Study of Simultaneous Multithreading in VLIW Processors,WanJiangHua/National University of Defense Science and Technology,2/161
  13. Key Techniques of Network-on-Chip Design for Multi-Core System-on-Chip,LiuXiangYuan/National University of Defense Science and Technology,5/521
  14. Key Techniques on Data Stream Speculation for Heterogeneous Multi-Core Digital Signal Processors,WangDong/National University of Defense Science and Technology,5/429
  15. Key Circuits and EDA Techniques Research of High Performance DSPs,LiZhenTao/National University of Defense Science and Technology,16/610
  16. Key Techniques of On-chip Trace Debug and Fault Detection for Embedded Multi-core Processor,ZuoXiao/National University of Defense Science and Technology,1/362
  17. Optimization Techniques of Cache in Chip MultiThreading,MaPengYong/National University of Defense Science and Technology,3/181
  18. Modeling and Hardening of Single Event Effect in Integrate Circuit,LiuBiWei/National University of Defense Science and Technology,9/870
  19. Research on the Design and Performance Optimization of Memory System for Stream Architecture,MaChiYuan/National University of Defense Science and Technology,0/100
  20. On-chip Large-scale Parallel Embedded Computing: Hierarchical Architecture Performance Model and Parallel Accelerating for H.264,ChenShengGang/National University of Defense Science and Technology,0/113
  21. Research on Pixel Matching Computation Acceleration in Video and Image Processing,GuHuiTao/National University of Defense Science and Technology,2/131
  22. Research on On-chip Memory Management and High Efficient Synchronization for Homogeneous Many-core Processors,ChenXiaoWen/National University of Defense Science and Technology,0/46
  23. Research on the Key Techniques of Application-Specific Instruction-Set Processors,ChenHu/National University of Defense Science and Technology,0/90
  24. The Design of Video Display Subsystem Based on YHFT-DSP,GuHuiTao/National University of Defense Science and Technology,0/47
  25. Pyrite slag utilization research,WangQuanLiang/Kunming University of Science and Technology,1/410
  26. Design and Optimization of Video Encoder Based on YHFT DSP,FanYuanQin/National University of Defense Science and Technology,2/41
  27. Design and Verification of High Speed Arithmetic and Logical Unit,LeiPuHong/National University of Defense Science and Technology,1/125
  28. Design and Verification of the Bus Interface Unit in X Microprocessor,LiHongHua/National University of Defense Science and Technology,0/32
  29. Improve the efficiency of X microprocessor technology validation,LiuLiXia/National University of Defense Science and Technology,0/41
  30. The Design of Video Capture Subsystem Based on YHFT DSP,ChenShengGang/National University of Defense Science and Technology,0/86
  31. The Design of a Video Processor Based on High-Performance YHFT DSP,ChenHu/National University of Defense Science and Technology,1/81
  32. Hardware Design of Adaptive Deblocking for H.264/AVC,XiaoZuo/National University of Defense Science and Technology,0/110
  33. A Design of YHFT’s Multiplier Unit and ALU,LuoFei/National University of Defense Science and Technology,1/104
  34. Expression of Nuclear Factor Kappa B and Cell Adhesion Molecules in the Placenta of Patients with Pregnancy Induced Hypertension,QuZuo/Qingdao University,0/55
  35. One thousand rock type metal mine tailings flotation recovery of sericite resources and its application,WangQiaoLing/Hunan University,0/90
  36. Study on Design Optimization of YHFT-DSP’s On-Chip Memory System,LuZuoAn/National University of Defense Science and Technology,1/76
  37. Design Optimization and Analysis of On-Chip Interconnect in Microprocessor,MaYongFei/National University of Defense Science and Technology,0/179
  38. Design and Analysis of a VLIW SMT Processor,HeRongHua/National University of Defense Science and Technology,0/143
  39. The Full-Customed Design and Optimization of Arithmetic Unit on High Performance DSP,XuHui/National University of Defense Science and Technology,3/182
  40. Study on Local Design Optimization of High Performance DSP’s On-Chip Storage System,ZhangDanZuo/National University of Defense Science and Technology,1/207
  41. The Design and Optimization of Instruction Control Unit on High Performance DSP,SunQing/National University of Defense Science and Technology,2/183
  42. The Design and Study of Level Two Cache Controller on High Performance DSP Chip,ChengYouMeng/National University of Defense Science and Technology,3/207
  43. Design and implementation of high-speed LVDS I / 0 interface chip FTLVDS,LiuXiangYuan/National University of Defense Science and Technology,3/441
  44. Wave impedance inversion method of genetic algorithm and its application,LiJing/Chengdu University of Technology,7/421
  45. A Fully Parallel Decoding Architecture of Turbo Code and Its VLSI Implementation,ZhangFengJu/National University of Defense Science and Technology,1/106
  46. Research and Implementation of Qlink-A Communicaiton Mechanism to Heterogeneous Multi-core DSP,GuoBaoDong/National University of Defense Science and Technology,1/195
  47. The Design and Implementation of High Performance Level Two Cache Controller on DSP Chip,LiuSheng/National University of Defense Science and Technology,3/81
  48. The Desigen and Implementation of the Inter-chip Asynchronous Bridge in the Muti-Core SoC Based on the PCI Express,CaoHao/National University of Defense Science and Technology,2/114
  49. The Design and Implementation of a 600MHz Multi-port Register File,ZhangNeng/National University of Defense Science and Technology,1/55
  50. The Pivotal Module Physical Design of YHFT-DX,LiuXiaoYu/National University of Defense Science and Technology,0/50

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