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Research and Application of Functional Verification Drived by Coverage
Author: HuYongChun
Tutor: OuGang;ZhangJian
School: National University of Defense Science and Technology
Course: Information and Communication Engineering
Keywords: Functional Verification Coverage Assertion Open Verification Methodolody
CLC: TN407
Type: Master's thesis
Year: 2009
Downloads: 56
Quote: 5
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Abstract
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In modern IC design,the scale and complexity of chips increase exponentially. To assure the functional correctness of designs, more time and resources are needed and the task of verification becomes more difficult. The ability of functional verification lags far behind of that of design, which makes the functional verification become a bottleneck of the design of large scale chips. CDV(Coverage Driven Verification)is a new verification methodology, which can greatly improve the efficiency, has been proved to be an advanced method in industrial IC design.A detailed research on CDV is given in the thesis, and the whole environment and each characteristic of CDV are summarized. The thesis focuses on the methods of building a CDV environment. CDV is compared with other methods from structure of testbench,functional coverage model building,the stimulus generation and the response checking. In order to overcome the shortcoming of the present simulation based verification,we bring the assertion into the verificational process to enhance the strategy from the checking mechanism of protocol and important timing and the coverage mechanism of modeling and reporting. The method improves the observability of the DUV and controllability of the verification process.Systemverilog classes are provided by OVM which is published by Cadence. It’s easy to develop verification environment based on CDV with OVM. Systemverilog assertion technology is also supported. With the functional verification of a navigation baseband chip as background, challenges in verification are analyzed, and then verification strategy is developed. An self-designed co-processor for communication is verified using OVM based on CDV. The experimental results present that the assertion based CDV can extremely save the debugging time and farther shorten the verification process. Moreover the method can find more verificational holes and improve the design confidence.
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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Testing and inspection
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